Abstract: Managing access to a cache memory includes dividing said cache memory into multiple of cache areas, each cache area having multiple entries; and providing at least one separate lock attribute for each cache area such that only a processor thread having possession of the lock attribute corresponding to a particular cache area can update that cache area.

Abstract: Managing access to a cache memory includes dividing said cache memory into multiple of cache areas, each cache area having multiple entries; and providing at least one separate lock attribute for each cache area such that only a processor thread having possession of the lock attribute corresponding to a particular cache area can update that cache area.

Abstract: Managing access to a cache memory includes dividing said cache memory into multiple of cache areas, each cache area having multiple entries; and providing at least one separate lock attribute for each cache area such that only a processor thread having possession of the lock attribute corresponding to a particular cache area can update that cache area.

Abstract: Managing access to a cache memory includes dividing said cache memory into multiple of cache areas, each cache area having multiple entries; and providing at least one separate lock attribute for each cache area such that only a processor thread having possession of the lock attribute corresponding to a particular cache area can update that cache area.

Abstract: A cache memory device includes a plurality of cache areas, each the cache area comprising a plurality of entries. The cache memory device is configured to maintain a separate lock attribute for each the cache area and temporarily assign possession of a lock attribute for a particular the cache area to a processor thread attempting to update the particular the cache area, the processor thread being unable to update the particular the cache area without possession of the lock attribute for the particular the cache area.

Abstract: Managing access to a cache memory includes dividing said cache memory into multiple of cache areas, each cache area having multiple entries; and providing at least one separate lock attribute for each cache area such that only a processor thread having possession of the lock attribute corresponding to a particular cache area can update that cache area.

Abstract: Virtual machines are managed by obtaining software hierarchy information of a current virtual machine to be installed. Then logical memory assigned to the current virtual machine is divided into a private part and a shared part based at least in part upon existing software hierarchy information of at least one virtual machine already installed and the software hierarchy information of the current virtual machine. Then, the shared part of the logical memory is mapped to shared segments of a physical memory, wherein the shared segments are used by at least one installed virtual machine.

Abstract: Virtual machines are managed by obtaining software hierarchy information of a current virtual machine to be installed. Then logical memory assigned to the current virtual machine is divided into a private part and a shared part based at least in part upon existing software hierarchy information of at least one virtual machine already installed and the software hierarchy information of the current virtual machine. Then, the shared part of the logical memory is mapped to shared segments of a physical memory, wherein the shared segments are used by at least one installed virtual machine.

Abstract: A method of accessing a shared data structure in parallel by multiple threads in a parallel application program is disclosed. A lock of the shared data structure is granted to one thread of the multiple threads, an operation of the thread which acquires the lock is performed on the shared data structure, an operation of each thread of the multiple threads which does not acquire the lock is buffered, and the buffered operations are performed on the shared data structure when another thread of the multiple threads subsequently acquires the lock. A corresponding apparatus and program product are also disclosed.

Abstract: Virtual machines are managed by obtaining software hierarchy information of a current virtual machine to be installed. Then logical memory assigned to the current virtual machine is divided into a private part and a shared part based at least in part upon existing software hierarchy information of at least one virtual machine already installed and the software hierarchy information of the current virtual machine. Then, the shared part of the logical memory is mapped to shared segments of a physical memory, wherein the shared segments are used by at least one installed virtual machine.

Abstract: Managing access to a cache memory includes dividing said cache memory into multiple of cache areas, each cache area having multiple entries; and providing at least one separate lock attribute for each cache area such that only a processor thread having possession of the lock attribute corresponding to a particular cache area can update that cache area.

Abstract: Virtual machines are managed by obtaining software hierarchy information of a current virtual machine to be installed. Then logical memory assigned to the current virtual machine is divided into a private part and a shared part based at least in part upon existing software hierarchy information of at least one virtual machine already installed and the software hierarchy information of the current virtual machine. Then, the shared part of the logical memory is mapped to shared segments of a physical memory, wherein the shared segments are used by at least one installed virtual machine.

Abstract: A computer-implementable method, system and computer-usable medium for extending the portability of code to a limited-class environment are disclosed. In a preferred embodiment, the method includes the steps of: identifying any full-version-only objects that are not in a reduced-version of a language, wherein the reduced-version of the language comprises a reduced portion of objects that are in a full-version of the language; associating a full-version-only object with a set of one or more objects in the reduced-version of the language, wherein the full-version-only object is functionally equivalent to the set of one or more objects in the reduced-version of the language; identifying any full-version-only objects in a software program; and creating a reduced-version of the software program by replacing any identified full-version-only objects with a functionally equivalent set of one or more objects from the reduced-version of the language.

Abstract: Managing access to a cache memory includes dividing said cache memory into multiple of cache areas, each cache area having multiple entries; and providing at least one separate lock attribute for each cache area such that only a processor thread having possession of the lock attribute corresponding to a particular cache area can update that cache area.

Abstract: A method of accessing a shared data structure in parallel by multiple threads in a parallel application program is disclosed, in which a lock of the shared data structure is granted to one thread of the multiple threads, an operation of the thread which acquires the lock is performed on the shared data structure, then an operation of each thread of the multiple threads which does not acquire the lock is buffered, and finally the buffered operations are performed on the shared data structure when another thread of the multiple threads subsequently acquires the lock. By using this method, the operations of other threads which do not acquire the lock of the shared data structure can be buffered automatically when the shared data structure is locked by one thread, and all the buffered operations can be performed when another thread acquires the lock.

Abstract: An exemplary sleeve used for an optical fiber connector includes a tubular main body. The main body is made of ceramic material. A cylindrical wall of the main body defines a cutout.

Abstract: A computer-implementable method, system and computer-usable medium for extending the portability of code to a limited-class environment are disclosed. In a preferred embodiment, the method includes the steps of: identifying any full-version-only objects that are not in a reduced-version of a language, wherein the reduced-version of the language comprises a reduced portion of objects that are in a full-version of the language; associating a full-version-only object with a set of one or more objects in the reduced-version of the language, wherein the full-version-only object is functionally equivalent to the set of one or more objects in the reduced-version of the language; identifying any full-version-only objects in a software program; and creating a reduced-version of the software program by replacing any identified full-version-only objects with a functionally equivalent set of one or more objects from the reduced-version of the language.

Abstract: An rotor and stator structure of a motor is provided. The rotor structure includes a rotation axis and a magnet encircling the rotation axis. The magnet is magnetized radially or axially. The stator structure includes a sleeve, a first ring positioned on one opening of the sleeve, and a second ring positioned on the other opening of the sleeve. N pieces of first salients and N pieces of second salients are spacedly and coplanarly extended from the first ring and the second ring respectively, and the position of each piece of the first salients corresponds to that of each piece of the second salients.

Abstract: An rotor and stator structure of a motor is provided. The rotor structure includes a rotation axis and a magnet encircling the rotation axis. The magnet is magnetized radially or axially. The stator structure includes a sleeve, a first ring positioned on one opening of the sleeve, and a second ring positioned on the other opening of the sleeve. N pieces of first salients and N pieces of second salients are spacedly and coplanarly extended from the first ring and the second ring respectively, and the position of each piece of the first salients corresponds to that of each piece of the second salients.