Abstract: A cooperative multithreading architecture includes an instruction cache, capable of providing a micro-VLIW instruction; a first cluster, connects to the instruction cache to fetch the micro-VLIW instruction; and a second cluster, connects to the instruction cache to fetch the micro-VLIW instruction and capable of execution acceleration. The second cluster includes a second front-end module, connects to the instruction cache and capable of requesting and dispatching the micro-VLIW instruction; a helper dynamic scheduler, connects to the second front-end module and capable of dispatching the micro-VLIW instruction; a non-shared data path, connects to the second front-end module and capable of providing a wider data path; and a shared data path, connected to the helper dynamic scheduler and capable of assisting a control part of the non-shared data path. The first cluster and the second cluster carry out execution of the respective micro-instructions in parallel.