Patents by Inventor Zhi-Xin Lin

Zhi-Xin Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11582018
    Abstract: A clock data calibration circuit including a first comparator, a multi-phase clock generator, a plurality of samplers, a plurality of data comparators and a data selector is provided. The first comparator compares first input data with second input data to generate a data signal. The multi-phase clock generator generates a plurality of clock signals, and the clock signals are divided into a plurality of clock groups. The sampler samples the data signal according to the clock groups to respectively generate a plurality of first sampled data signal groups. The data comparators respectively sample the first sampled data signal groups according to selected clocks to generate a plurality of second sampled data signal groups. Each data comparator generates a plurality of status flags according to a variation state of a plurality of second sampled data. The data selector generates a plurality of output data signals according to the status flags.
    Type: Grant
    Filed: August 4, 2021
    Date of Patent: February 14, 2023
    Assignee: Faraday Technology Corp.
    Inventors: Jing-Zhi Gao, Yu-Hsin Tseng, Yung-Sung Chang, Zhi-Xin Lin
  • Publication number: 20220337385
    Abstract: A clock data calibration circuit including a first comparator, a multi-phase clock generator, a plurality of samplers, a plurality of data comparators and a data selector is provided. The first comparator compares first input data with second input data to generate a data signal. The multi-phase clock generator generates a plurality of clock signals, and the clock signals are divided into a plurality of clock groups. The sampler samples the data signal according to the clock groups to respectively generate a plurality of first sampled data signal groups. The data comparators respectively sample the first sampled data signal groups according to selected clocks to generate a plurality of second sampled data signal groups. Each data comparator generates a plurality of status flags according to a variation state of a plurality of second sampled data. The data selector generates a plurality of output data signals according to the status flags.
    Type: Application
    Filed: August 4, 2021
    Publication date: October 20, 2022
    Applicant: Faraday Technology Corp.
    Inventors: Jing-Zhi Gao, Yu-Hsin Tseng, Yung-Sung Chang, Zhi-Xin Lin
  • Patent number: 7738713
    Abstract: An apparatus for processing an image with a discrete wavelet transform is provided. For one-dimensional circuit, the method changes conventional image data processing flow and uses common product of sequential calculations with respect to the time axis. The calculations for input data are not repeated so that components of the hardware architecture are minimized. For two-dimensional circuit, the method uses an external data scanning method to eliminate an external memory, transposing buffer, from a transforming circuit.
    Type: Grant
    Filed: August 31, 2006
    Date of Patent: June 15, 2010
    Inventors: Zhi-Xin Lin, Jinn-Shyan Wang, Ching-Wei Yeh
  • Publication number: 20080056372
    Abstract: An apparatus for processing an image with a discrete wavelet transform is provided. For one-dimensional circuit, the method changes conventional image data processing flow and uses common product of sequential calculations with respect to the time axis. The calculations for input data are not repeated so that components of the hardware architecture are minimized. For two-dimensional circuit, the method uses an external data scanning method to eliminate an external memory, transposing buffer, from a transforming circuit.
    Type: Application
    Filed: August 31, 2006
    Publication date: March 6, 2008
    Inventors: Zhi-Xin Lin, Jinn-Shyan Wang, Ching-Wei Yeh