Patents by Inventor Zhibo XU
Zhibo XU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11965257Abstract: A method for preparing a COF-protected electrode and an electrode are provided. The method includes mixing an organic framework, a small molecular organic acid and a solvent, adding a polar aqueous solution containing a substrate thereto, mixing the above uniformly and heating the system at a low temperature under an inert atmosphere, filtering the solution to obtain precipitates, washing and drying the precipitates to obtain a COF film grown on a surface of the substrate; coating a protective layer on the COF film to obtain a substrate/COF/protective layer film; etching off the substrate to obtain a COF/protective layer film; and transferring the COF/protective layer film to a surface of the electrode, and removing the protective layer.Type: GrantFiled: December 23, 2021Date of Patent: April 23, 2024Assignee: Huaneng Clean Energy Research InstituteInventors: Chang Zhang, Jinyi Wang, Zhibo Ren, Pengjie Wang, Xianming Xu, Huan Zhang
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Publication number: 20240121174Abstract: The technology of this application relates to an information processing method, apparatus, and system. The method includes a controller determining network slice information corresponding to a first network device. The controller sends a border gateway protocol (BGP) packet to the first network device, where the BGP packet includes the network slice information, and the network slice information is used by the first network device to configure a network slice. According to the technical solution provided in this application, efficiency of delivering network slice information can be improved.Type: ApplicationFiled: December 15, 2023Publication date: April 11, 2024Inventors: Zhibo HU, Lei BAO, Jie DONG, Guoqi XU, Zhaoyang YAN, Shunwan ZHUANG
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Publication number: 20240106749Abstract: This application provides a packet processing method and apparatus, a device, and a storage medium, and pertains to the field of communication technologies. In this application, a control identifier field is added to a packet, and the control identifier field indicates whether forwarding of the packet is allowed when the first network device does not configure the slice identifier on an outbound interface. The control identifier field and a slice identifier of a network slice are carried in the packet, so that the slice identifier and the control identifier field are transmitted on a network together. When a receive end does not configure the slice identifier on the outbound interface, the receive end can discard the packet based on the control identifier field, instead of forwarding the packet by using routing information.Type: ApplicationFiled: December 5, 2023Publication date: March 28, 2024Inventors: Lei Bao, Juhua Xu, Zhibo Hu
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Publication number: 20230197895Abstract: A light emitting diode includes a first conductivity-type semiconductor layer, a second conductivity-type semiconductor layer, a light emitting layer, and a stress relief layer. The second conductivity-type semiconductor layer has a conductivity type opposite to that of the first conductivity-type semiconductor layer. The light emitting layer is disposed between the first conductivity-type semiconductor layer and the second conductivity-type semiconductor layer. The stress relief layer is disposed between the first conductivity-type semiconductor layer and the light emitting layer, and includes well layers and barrier layers stacked alternately. The stress relief layer further includes at least one blocking zone in at least one of the well layers. The at least one blocking zone has an energy gap greater than an energy gap of the at least one of the well layers. A method for manufacturing the light emitting diode is also disclosed.Type: ApplicationFiled: February 24, 2023Publication date: June 22, 2023Inventors: Zhibo XU, Zhihua ZHANG, Mingbin MA, Cheng-Hung LEE, Chan-Chan LIN, Chia-Hao CHANG
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Publication number: 20220400896Abstract: An air fryer includes a housing, in which a cooking cavity and a heating cavity are formed, the heating cavity being located behind the cooking cavity; a heating device, which is arranged in the housing to heat the cooking cavity; and a food container, which is placed inside the cooking cavity.Type: ApplicationFiled: September 1, 2020Publication date: December 22, 2022Inventors: Zhibo XU, Huayong LIU, Zujing DU, Liang YAO, Huimin WU, Fufeng XIAO
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Publication number: 20210015298Abstract: A temperature control method for a cookware includes collecting temperature values detected by a plurality of temperature sensors arranged at different positions of a heating area of the cookware, determining a minimum temperature value and a maximum temperature value of the heating area from among the collected temperature values, starting a heating device in response to the minimum temperature value and the maximum temperature value of the heating area satisfying a preset temperature increase condition, and stopping the heating device in response to the minimum temperature value and the maximum temperature value of the heating area satisfying a preset temperature reduction condition.Type: ApplicationFiled: August 27, 2018Publication date: January 21, 2021Inventors: Zhibo XU, Fenglei XING, Weiwei CHEN, Peng BI, Xiubao LIN, Maozhen SHAN
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Patent number: 10263139Abstract: A fabrication method of a nitride semiconductor LED includes, an AlxInyGa1-x-yN material layer is deposited by CVD between an AlN thin film layer by PVD and a gallium nitride series layer by CVD, to reduce the stress effect between the AlN thin film layer and the nitride layer, improve the overall quality of the LED and efficiency. An AlN thin film layer is deposited on a patterned substrate having a larger depth by PVD, and a thin nitrogen epitaxial layer is deposited on the AIN thin film layer by CVD, which reduces the stress by reducing the thickness of the epitaxial layer and improves warpage of the wafer and electric uniformity of the single wafer; the light extraction efficiency is improved by using the large depth patterned substrate; further, the doping of high-concentration impurity in the active layer effectively reduces voltage characteristics without affecting leakage, thereby improving the overall yield.Type: GrantFiled: January 8, 2017Date of Patent: April 16, 2019Assignee: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Hsiang-lin Hsieh, Zhibo Xu, Cheng-hung Lee, Chan-chan Ling, Chang-cheng Chuo, Chia-hung Chang
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Patent number: 10158046Abstract: A semiconductor element has a metal protective layer and a metal oxide protective layer formed on the substrate to prevent the Si substrate surface from forming an amorphous layer; and a transition layer to reduce lattice difference between the metal oxide protective layer and the III-V-group buffer layer, thus improving crystal quality of the III-V-group buffer layer. A fabrication method can avoid formation of amorphous layers and cracks surrounding the Si substrate surface. A light-emitting diode (LED) element or a transistor element can be formed by depositing a high-quality multi-layer buffer structure via PVD and forming a GaN, InGaN or AlGaN epitaxial layer thereon.Type: GrantFiled: May 28, 2017Date of Patent: December 18, 2018Assignee: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Zhibo Xu, Sheng-wei Chou, Chih-ching Cheng, Xiao Wang
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Publication number: 20170263819Abstract: A semiconductor element has a metal protective layer and a metal oxide protective layer formed on the substrate to prevent the Si substrate surface from forming an amorphous layer; and a transition layer to reduce lattice difference between the metal oxide protective layer and the III-IV-group buffer layer, thus improving crystal quality of the III-IV-group buffer layer. A fabrication method can avoid formation of amorphous layers and cracks surrounding the Si substrate surface. A light-emitting diode (LED) element or a transistor element can be formed by depositing a high-quality multi-layer buffer structure via PVD and forming a GaN, InGaN or AlGaN epitaxial layer thereon.Type: ApplicationFiled: May 28, 2017Publication date: September 14, 2017Applicant: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Zhibo XU, Sheng-wei CHOU, Chih-ching CHENG, Xiao WANG
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Publication number: 20170148949Abstract: A nitride light-emitting diode (LED) structure includes a substrate, a buffer layer, an N-type layer, a stress release layer, a quantum well light-emitting layer and a P-type layer, wherein, between the N-type layer and the stress release layer, an electric field distribution layer is inserted, which is an n-doped multi-layer GaN structure with growth temperature equaling to or lower than that of the quantum well light-emitting layer; and GaN layers of different doping concentrations are applied to gradually reduce electric field concentration and make uniform spreading of current, thus enhancing electrostatic voltage endurance, reducing failure rate during usage, improving operational reliability and extending service life of the nitride semiconductor component.Type: ApplicationFiled: February 7, 2017Publication date: May 25, 2017Applicant: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Yung-ling LAN, Chia-hung CHANG, Chan-chan LING, Hsiang-lin HSIEH, Hsiang-pin HSIEH, Zhibo XU
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Publication number: 20170117436Abstract: A fabrication method of a nitride semiconductor LED includes, an AlxInyGa1-x-yN material layer is deposited by CVD between an AlN thin film layer by PVD and a gallium nitride series layer by CVD, to reduce the stress effect between the AlN thin film layer and the nitride layer, improve the overall quality of the LED and efficiency. An AlN thin film layer is deposited on a patterned substrate having a larger depth by PVD, and a thin nitrogen epitaxial layer is deposited on the AlN thin film layer by CVD, which reduces the stress by reducing the thickness of the epitaxial layer and improves warpage of the wafer and electric uniformity of the single wafer; the light extraction efficiency is improved by using the large depth patterned substrate; further, the doping of high-concentration impurity in the active layer effectively reduces voltage characteristics without affecting leakage, thereby improving the overall yield.Type: ApplicationFiled: January 8, 2017Publication date: April 27, 2017Applicant: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Hsiang-lin HSIEH, Zhibo XU, Cheng-hung LEE, Chan-chan LIN, Chang-cheng CHUO, Chia-hung CHANG
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Patent number: D988059Type: GrantFiled: November 30, 2021Date of Patent: June 6, 2023Assignee: MIDEA GROUP CO., LTD.Inventors: Weijia Kong, Zhibo Xu