Patents by Inventor Zhicheng Shi

Zhicheng Shi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240090205
    Abstract: The present disclosure provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes a substrate, a word line, and at least two dielectric layers. The word line is arranged in the substrate; the at least two dielectric layers are located between the word line and the substrate and have different dielectric constants.
    Type: Application
    Filed: January 6, 2023
    Publication date: March 14, 2024
    Inventors: Yongli Zhao, Zhicheng Shi, Yachao Xu, Yong Lu
  • Publication number: 20240064971
    Abstract: The disclosure relates to a semiconductor structure and a method for forming the same. The semiconductor structure includes: a substrate; a storage array located on the substrate and including a plurality of memory cells arranged in an array along a first direction and a second direction, each memory cell including a transistor structure that includes a gate electrode and an active area that includes a first active area and a second active area distributed on opposite sides of the gate electrode along the first direction; a word line extending along the second direction, being continuously and electrically connected with a plurality of gate electrodes in the memory cells arranged at intervals along the second direction; a bit line extending along the first direction and located on outside of each of the memory cells along the second direction.
    Type: Application
    Filed: August 16, 2023
    Publication date: February 22, 2024
    Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Zhicheng Shi, Ruiqi Zhang, Xinran Liu
  • Patent number: 11871554
    Abstract: A semiconductor structure includes: a base substrate; an insulator, located on one side of the base substrate; bit lines, arranged in the insulator, the bit lines being distributed at intervals along first direction and extending along second direction; active bodies, located in the insulator, the active bodies being located on sides of respective bit lines facing away from the base substrate, orthographic projection of each active body on the base substrate at least partially coinciding with the orthographic projection of a respective bit line on the base substrate, and the active bodies being distributed at intervals along second direction; and word lines, located in the insulator and located on sides of respective bit lines facing away from the base substrate, the word lines being distributed at intervals along second direction and extending along first direction, and only one word line being arranged between two adjacent active bodies in second direction.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: January 9, 2024
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Tao Chen, ZhiCheng Shi
  • Publication number: 20230292493
    Abstract: The present disclosure provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes a substrate and a word line (WL) structure, wherein the substrate includes trenches arranged in parallel intervals; the WL structure is located in the trenches, and includes a dielectric layer and a conductive layer; the dielectric layer covers a bottom surface and a sidewall of the conductive layer; the conductive layer includes a first conductive layer and a second conductive layer; and a first component is doped in the second conductive layer.
    Type: Application
    Filed: June 8, 2022
    Publication date: September 14, 2023
    Inventors: Renhu LI, Ming-Hung HSIEH, Yong LU, Zhicheng SHI
  • Publication number: 20230225104
    Abstract: Embodiments provide a semiconductor structure and a fabricating method. The semiconductor structure includes: a substrate, where a trench is formed in the substrate; a conductive layer positioned in the trench, where the conductive layer includes a first conductive layer and a second conductive layer, the second conductive layer is positioned on the first conductive layer, and a projection area of a bottom of the second conductive layer within the trench is greater than a projection area of a top of the first conductive layer within the trench; a dielectric layer positioned between the conductive layer and an inner wall of the trench, where a top of the dielectric layer is lower than the top of the first conductive layer; an isolation layer positioned on the conductive layer; and a void defined by the isolation layer, the conductive layer, the dielectric layer, and a side wall of the trench.
    Type: Application
    Filed: January 10, 2023
    Publication date: July 13, 2023
    Inventors: Yong LU, Zhicheng SHI, Xinran LIU, Ruiqi ZHANG
  • Publication number: 20220077158
    Abstract: A semiconductor structure includes: a base substrate; an insulator, located on one side of the base substrate; bit lines, arranged in the insulator, the bit lines being distributed at intervals along first direction and extending along second direction; active bodies, located in the insulator, the active bodies being located on sides of respective bit lines facing away from the base substrate, orthographic projection of each active body on the base substrate at least partially coinciding with the orthographic projection of a respective bit line on the base substrate, and the active bodies being distributed at intervals along second direction; and word lines, located in the insulator and located on sides of respective bit lines facing away from the base substrate, the word lines being distributed at intervals along second direction and extending along first direction, and only one word line being arranged between two adjacent active bodies in second direction.
    Type: Application
    Filed: August 2, 2021
    Publication date: March 10, 2022
    Inventors: Tao CHEN, ZhiCheng SHI
  • Patent number: 6211104
    Abstract: A catalyst for catalytic pyrolysis process for the production of light olefins comprises 10˜70 wt % (based on the weight of catalyst) of clay, 5˜85 wt % of inorganic oxides and 1-50 wt % zeolite, wherein said zeolite is a mixture of 0˜25 wt % of Y type zeolite and 75˜100 wt % of phosphorus and aluminum or phosphorus and magnesium or phosphorus and calcium containing high silica zeolite having a structure of pentasil; said pentasil high silica zeolite being one selected from the group consisting of ZSM-5, ZSM-8 and ZSM-11 of zeolites containing 2˜8 wt % of phosphorus and 0.3˜3 wt % of aluminum or magnesium or calcium (calculated as the oxides), having a silica/alumina mole ratio of 15-60. The catalyst exhibits excellent activity stability and high yields of light olefin, especially for C2=. It can at the same level of yields of light olefins as that of steam thermal cracking at a lower reaction temperature than that of steam thermal cracking.
    Type: Grant
    Filed: October 15, 1998
    Date of Patent: April 3, 2001
    Assignees: China Petrochemical Corporation, Research Institute of Petroleum Processing, SINOPEC
    Inventors: Zhicheng Shi, Fengmei Zhang, Shunhua Liu
  • Patent number: 6080698
    Abstract: A molecular sieve containing composition, which can be applied in catalytic cracking reaction for producing more ethylene and propylene, and its preparation method. The composition contains a pentasil-type molecular sieve having a SiO.sub.2 /Al.sub.2 O.sub.3 molar ratio of 15-60, prepared by activation and modification with phosphorus, alkaline earth metal and transition metal. The composition essentially includes 85.about.98% wt of pentasil-type molecular sieve, 1.about.10% wt of P.sub.2 O.sub.5, 0.3.about.5% wt of alkaline earth oxide, and 0.3.about.5% wt of transition metal oxide. The molecular sieve structure and active centers have high thermal and hydrothermal stability. The salient feature of this composition is that when applied as an active component of cracking catalyst for catalytic pyrolysis process, the yield of ethylene is above 18% and the total yield of ethylene and propylene is more than 40%.
    Type: Grant
    Filed: September 17, 1998
    Date of Patent: June 27, 2000
    Assignees: China Petrochemical Corporation, Research Institute of Petroleum Processing
    Inventors: Fengmei Zhang, Xingtian Shu, Zhicheng Shi, Weidong Wang, Fengming Qin, Xieqing Wang
  • Patent number: 5232675
    Abstract: The present invention discloses a rare earth-containing high-silica zeolite having penta-sil type structure and process for the same. The anhydrous composition of the high-silica zeolite of the present invention (based on the mole ratio of oxides) can be defined by the formulaxRE.sub.2 O.sub.3 yNa.sub.2 OAl.sub.2 O.sub.3 zSiO.sub.2in which X=0.01-0.30, y=0.4-1.0, and z=20-60. The high-silica zeolite of the present invention is an useful active component for catalysts.
    Type: Grant
    Filed: January 14, 1992
    Date of Patent: August 3, 1993
    Assignees: Research Institute of Petroleum Processing, China Petrochemical Corporation
    Inventors: Xingtian Shu, Wei Fu, Mingyuan He, Meng Zhou, Zhicheng Shi, Shugin Zhang