Patents by Inventor ZhiFeng GAN

ZhiFeng GAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of forming the gate with the LELE double pattern
    Patent number: 9171731
    Abstract: The invention relates to microelectronic technology and, more specifically, relates to a method of forming a gate with a LELE double pattern. The method adopts an ONO structure (Oxide-SiN-Oxide). The ONO structure is exposed twice, and the advanced patterning film is used as a mask in the processing of polysilicon etching. The ONO structure is used to replace the traditional hardmask of silicon oxide, and the substructure of ODL (Organic Under Layer) which is based on the spin-on, and the middle layer structure of SHB (Si-based hardmask). The method saves cost and improves the process of advanced patterning film as a mask with the nodes in 40 nm and above which is applied to the process with the nodes in 22/20 nm and below. Consequently, the maturity and stability of the process for poly gate with the nodes in 22/20 nm and below are improved.
    Type: Grant
    Filed: November 20, 2013
    Date of Patent: October 27, 2015
    Assignee: Shanghai Huali Microelectronics Corporation
    Inventors: Jun Huang, ZhiBiao Mao, QuanBo Li, ZhiFeng Gan, RunLing Li
  • METHOD OF FORMING THE GATE WITH THE LELE DOUBLE PATTERN
    Publication number: 20150050801
    Abstract: The invention relates to microelectronic technology and, more specifically, relates to a method of forming a gate with a LELE double pattern. The method adopts an ONO structure (Oxide-SiN-Oxide). The ONO structure is exposed twice, and the advanced patterning film is used as a mask in the processing of polysilicon etching. The ONO structure is used to replace the traditional hardmask of silicon oxide, and the substructure of ODL (Organic Under Layer) which is based on the spin-on, and the middle layer structure of SHB (Si-based hardmask). The method saves cost and improves the process of advanced patterning film as a mask with the nodes in 40 nm and above which is applied to the process with the nodes in 22/20 nm and below. Consequently, the maturity and stability of the process for poly gate with the nodes in 22/20 nm and below are improved.
    Type: Application
    Filed: November 20, 2013
    Publication date: February 19, 2015
    Applicant: Shanghai Huali Microelectronics Corporation
    Inventors: Jun HUANG, ZhiBiao MAO, QuanBo LI, ZhiFeng GAN, RunLing LI