Abstract: A sense amplifier for a flash memory is disclosed which includes a pre-charging circuit, a first capacitor, a first inverter, and a first transmission gate connected in parallel with the first inverter, the pre-charging circuit is connectable to a reference voltage node, and is able to pre-charge a word line, of the flash memory, via the reference voltage node, a potential of the reference voltage node remains unchanged after the pre-charging is completed; a potential of the reference voltage node is adjustable according to a state of the flash memory until an output voltage of the first inverter changes; the first capacitor has a first end connected to the reference voltage node, a second end connected to an input of the first inverter and a first end of the first transmission gate; an output of the first inverter is connected to a second end of the first transmission gate.

Abstract: A charge pump drive circuit is disclosed. The charge pump drive circuit provides a switch signal to a charge pump which provides a memory with a read voltage and a read current. The charge pump drive circuit includes a read drive circuit and a standby drive circuit. The read drive circuit is powered by a first power supply and provides the charge pump with a switch signal when the memory is in an active reading state. The standby drive circuit is powered by a second power supply and provides the charge pump with a switch signal when the memory is in a read standby state. The first power supply provides a voltage level ranging from 1.6 V to 3.8 V, and the second power supply provides a voltage level of 1.5 V.

Abstract: A voltage detection circuit for a charge pump is disclosed. The voltage detection circuit includes a sampling circuit and a latch circuit. The sampling circuit is configured to sample a supply voltage and provide the latch circuit with a sampled voltage. The latch circuit is configured to detect the sampled voltage and latch a result of the detection. And the latch circuit is connected to a voltage regulation circuit which is configured to regulate a charge-pump cascade structure in the charge pump based on the result of the detection so as to maintain an output voltage of the charge pump stable.

Abstract: A charge pump drive circuit is disclosed. The charge pump drive circuit provides a switch signal to a charge pump which provides a memory with a read voltage and a read current. The charge pump drive circuit includes a read drive circuit and a standby drive circuit. The read drive circuit is powered by a first power supply and provides the charge pump with a switch signal when the memory is in an active reading state. The standby drive circuit is powered by a second power supply and provides the charge pump with a switch signal when the memory is in a read standby state. The first power supply provides a voltage level ranging from 1.6 V to 3.8 V, and the second power supply provides a voltage level of 1.5 V.

Abstract: A voltage detection circuit for a charge pump is disclosed. The voltage detection circuit includes a sampling circuit and a latch circuit. The sampling circuit is configured to sample a supply voltage and provide the latch circuit with a sampled voltage. The latch circuit is configured to detect the sampled voltage and latch a result of the detection. And the latch circuit is connected to a voltage regulation circuit which is configured to regulate a charge-pump cascade structure in the charge pump based on the result of the detection so as to maintain an output voltage of the charge pump stable.

Abstract: A charge pump is disclosed, including: multiple charge-pump stages connected sequentially; multiple switches, coupled between output of a corresponding one of charge-pump stages and output of charge pump; multiple second switches, coupled, at one end, to output of a corresponding one of charge-pump stages and to input of immediately succeeding one of charge-pump stages at other end; and multiple third switch, coupled between output of corresponding one of charge-pump stages and input of charge pump. First, second and third switches are opened or closed to determine a number of charge-pump stages connected in series and a number of charge-pump stages connected in parallel. The greater the number of charge-pump stages connected in series in charge-pump cascade is, the higher output voltage of charge pump will be, and the greater the number of charge-pump stages connected in parallel in charge-pump cascade, the higher drive current produced by charge pump will be.

Abstract: A sense amplifier for a flash memory is disclosed which includes a pre-charging circuit, a first capacitor, a first inverter, and a first transmission gate connected in parallel with the first inverter, the pre-charging circuit is connectable to a reference voltage node, and is able to pre-charge a word line, of the flash memory, via the reference voltage node, a potential of the reference voltage node remains unchanged after the pre-charging is completed; a potential of the reference voltage node is adjustable according to a state of the flash memory until an output voltage of the first inverter changes; the first capacitor has a first end connected to the reference voltage node, a second end connected to an input of the first inverter and a first end of the first transmission gate; an output of the first inverter is connected to a second end of the first transmission gate.