Patents by Inventor Zhifeng Wen

Zhifeng Wen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250035329
    Abstract: A room area acquisition method includes: setting a room area initial value according to an air conditioner model parameter; acquiring a stable operation duration and a number of stop times of an air conditioner outdoor unit from starting up and stable operation to stopping at a temperature point; estimating a deviation between the room area initial value and a room area actual value according to the stable operation duration and the number of stop times, and outputting a deviation result; adjusting the room area initial value according to the deviation result, and performing estimation again according to an adjusted room area value; and taking the current room area value as the room area actual value when a deviation result output by current estimation is different from a deviation result output by last estimation.
    Type: Application
    Filed: October 15, 2024
    Publication date: January 30, 2025
    Applicant: GREE ELECTRIC APPLIANCES, INC. OF ZHUHAI
    Inventors: Kai DU, Hongliang ZOU, Dongbiao WEN, Zhifeng LI, Fan WU
  • Patent number: 9047810
    Abstract: The present disclosure provides a circuit for discharging parasitic capacitance in a display panel with common-anode topology having a plurality of light emitters, as well as a circuit for charging parasitic capacitance in a display panel with common-cathode topology. In the common-cathode topology, the circuit includes a three-terminal device having a gate, a source, and a drain, wherein one of the source and the drain is electrically coupled to a common cathode of the light emitters, and a mechanism for controlling the three-terminal device, the mechanism being electrically coupled to the gate. Shortly after a previously selected light emitter is unselected, the mechanism turns on the three-terminal device to form a conductive path between the source and the drain. The mechanism turns off the three-terminal device after a voltage at the common cathode is increased to a predetermined voltage level or after a maximum period of time lapses.
    Type: Grant
    Filed: February 15, 2012
    Date of Patent: June 2, 2015
    Assignee: SCT TECHNOLOGY, LTD.
    Inventors: Eric Li, Yutao Chen, Jianxin Xue, Wenjie Yang, Shoulin Li, Chun Lu, Zhifeng Wen, Shean-Yih Chiou, Shang-Kuan Tang, Shahnad Nadershahi
  • Publication number: 20120206430
    Abstract: The present disclosure provides a circuit for discharging parasitic capacitance in a display panel with common-anode topology having a plurality of light emitters, as well as a circuit for charging parasitic capacitance in a display panel with common-cathode topology. In the common-cathode topology, the circuit includes a three-terminal device having a gate, a source, and a drain, wherein one of the source and the drain is electrically coupled to a common cathode of the light emitters, and a mechanism for controlling the three-terminal device, the mechanism being electrically coupled to the gate. Shortly after a previously selected light emitter is unselected, the mechanism turns on the three-terminal device to form a conductive path between the source and the drain. The mechanism turns off the three-terminal device after a voltage at the common cathode is increased to a predetermined voltage level or after a maximum period of time lapses.
    Type: Application
    Filed: February 15, 2012
    Publication date: August 16, 2012
    Applicant: SCT Technology, Ltd.
    Inventors: Eric Li, Chun Lu, Jianxin Xue, Wenjie Yang, Watt Li, Yutao Chen, Zhifeng Wen, Shean-Yih Chiou, Shang-kuan Tang, Nedi Nadershashi