Patents by Inventor Zhi-Gang Bai
Zhi-Gang Bai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9761254Abstract: A MR sensor is disclosed that has a free layer (FL) with perpendicular magnetic anisotropy (PMA), which eliminates the need for an adjacent hard bias structure to stabilize free layer magnetization, and minimizes shield-FL interactions. In a TMR embodiment, a seed layer, free layer, junction layer, reference layer, and pinning layer are sequentially formed on a bottom shield. After forming a sensor sidewall that stops in the seed layer or on the bottom shield, a conformal insulation layer is deposited. Thereafter, a top shield is formed on the insulation layer and includes side shields that are separated from the FL by a narrow read gap. The sensor is scalable to widths <50 nm when PMA is greater than the FL self-demag field. Effective bias field is rather insensitive to sensor aspect ratio, which makes tall stripe and narrow width sensors viable for high RA TMR configurations.Type: GrantFiled: November 29, 2016Date of Patent: September 12, 2017Assignee: Headway Technologies, Inc.Inventors: Yuchen Zhou, Kunliang Zhang, Zhi Gang Bai
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Publication number: 20170077391Abstract: A MR sensor is disclosed that has a free layer (FL) with perpendicular magnetic anisotropy (PMA), which eliminates the need for an adjacent hard bias structure to stabilize free layer magnetization, and minimizes shield-FL interactions. In a TMR embodiment, a seed layer, free layer, junction layer, reference layer, and pinning layer are sequentially formed on a bottom shield. After forming a sensor sidewall that stops in the seed layer or on the bottom shield, a conformal insulation layer is deposited. Thereafter, a top shield is formed on the insulation layer and includes side shields that are separated from the FL by a narrow read gap. The sensor is scalable to widths <50 nm when PMA is greater than the FL self-demag field. Effective bias field is rather insensitive to sensor aspect ratio, which makes tall stripe and narrow width sensors viable for high RA TMR configurations.Type: ApplicationFiled: November 29, 2016Publication date: March 16, 2017Inventors: Yuchen Zhou, Kunliang Zhang, Zhi Gang Bai
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Patent number: 7723163Abstract: A method of forming a pre-molded lead frame having increased stand-offs includes the steps of attaching a first tape to a first side of the lead frame and a second tape to a second side of the lead frame. The taped lead frame is placed in a mold and a first flow of mold compound is initiated. The first flow of the mold compound fills a space between the first tape and an upper mold chase of the mold. A second flow of the mold compound then is initiated. The second flow of the mold compound fills the spaces between a die pad and leads of the lead frame. The first and second tapes then are removed from the lead frame. Improved stand-offs are provided because the first tape was depressed by the first flow of the mold compound.Type: GrantFiled: May 26, 2008Date of Patent: May 25, 2010Assignee: Freescale Semiconductor, Inc.Inventors: Xue-song Xu, Zhi-gang Bai, Nan Xu, Jin-zhong Yao
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Patent number: 7683465Abstract: A semiconductor device is provided that includes a leadframe, a die, and a clip. The leadframe has a flag and a power pad. The die is coupled to the flag. The clip comprises a die retaining section and a pad section. The die is coupled to the die retaining section, and the pad section extends from the die retaining section. The pad section is coupled to the power pad.Type: GrantFiled: September 17, 2007Date of Patent: March 23, 2010Assignee: Freescale Semiconductor, Inc.Inventors: Vasile Romega Thompson, Zhi-Gang Bai
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Publication number: 20090098686Abstract: A method of forming a pre-molded lead frame having increased stand-offs includes the steps of attaching a first tape to a first side of the lead frame and a second tape to a second side of the lead frame. The taped lead frame is placed in a mold and a first flow of mold compound is initiated. The first flow of the mold compound fills a space between the first tape and an upper mold chase of the mold. A second flow of the mold compound then is initiated. The second flow of the mold compound fills the spaces between a die pad and leads of the lead frame. The first and second tapes then are removed from the lead frame. Improved stand-offs are provided because the first tape was depressed by the first flow of the mold compound.Type: ApplicationFiled: May 26, 2008Publication date: April 16, 2009Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Xue-song Xu, Zhi-gang Bai, Nan Xu, Jin-zhong Yao
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Publication number: 20080283980Abstract: A lead frame (10) for a quad flat non-leaded semiconductor package (606), includes a tie bar (12), a first group of leads (22) extending a first length from the tie bar (12) in a transverse direction (Y), and a second group of leads (24) extending a second length from the tie bar (12) in the transverse direction (Y). The second length is greater than the first length, and leads from the first and second group of leads (22, 24) alternate in a longitudinal direction (X) along the tie bar (12) so that the first and second groups of leads are staggered. The second group of leads (24) is displaced from the first group of leads (22) in a Z-direction (Z) perpendicular to both the transverse (Y) and longitudinal (X) directions. The leads of the first and second groups of leads (22, 24) each have a respective contact terminal (26 and 28) at their distal ends. The contact terminals (26 and 28) each have a contact face (40 and 42) in a contact plane (44).Type: ApplicationFiled: April 9, 2008Publication date: November 20, 2008Applicant: FREESCALE SEMICONDUCTOR, INCInventors: Wei Gao, Zhi-Gang Bai, Li-Wei Liu, Zhi-Jie Wang, Yuan Zang, Hong Zhu
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Publication number: 20080042246Abstract: A semiconductor device is provided that includes a leadframe, a die, and a clip. The leadframe has a flag and a power pad. The die is coupled to the flag. The clip comprises a die retaining section and a pad section. The die is coupled to the die retaining section, and the pad section extends from the die retaining section. The pad section is coupled to the power pad.Type: ApplicationFiled: September 17, 2007Publication date: February 21, 2008Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Vasile Thompson, Zhi-Gang Bai
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Patent number: 7271469Abstract: A semiconductor device is provided that includes a leadframe, a die, and a clip. The leadframe has a flag and a power pad. The die is coupled to the flag. The clip comprises a die retaining section and a pad section. The die is coupled to the die retaining section, and the pad section extends from the die retaining section. The pad section is coupled to the power pad. Methods for forming the semiconductor device are provided as well.Type: GrantFiled: May 31, 2005Date of Patent: September 18, 2007Assignee: Freescale Semiconductor, Inc.Inventors: Vasile Romega Thompson, Zhi-Gang Bai
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Publication number: 20060267161Abstract: A semiconductor device is provided that includes a leadframe, a die, and a clip. The leadframe has a flag and a power pad. The die is coupled to the flag. The clip comprises a die retaining section and a pad section. The die is coupled to the die retaining section, and the pad section extends from the die retaining section. The pad section is coupled to the power pad. Methods for forming the semiconductor device are provided as well.Type: ApplicationFiled: May 31, 2005Publication date: November 30, 2006Inventors: Vasile Thompson, Zhi-Gang Bai
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Patent number: 7033866Abstract: A leadframe (20) for a semiconductor device includes a first leadframe portion (12) having a perimeter that defines a cavity (16) and a plurality of leads (14) extending inwardly from the perimeter and a first thickness. A second leadframe portion (18) is attached to the first leadframe portion (16). The second leadframe portion (18) has a die paddle (20) received within the cavity (16) of the first leadframe portion (12). The second leadframe portion (18) has a second thickness that is greater than a thickness of the first leadframe portion (12). Such a dual gauge leadframe is suitable especially for high power devices in which the die paddle acts as a heat sink.Type: GrantFiled: January 26, 2005Date of Patent: April 25, 2006Assignee: Freescale Semiconductor, Inc.Inventors: Wai Wong Chow, Zhi-Gang Bai, Clem H. Brown
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Patent number: 6917097Abstract: A leadframe (20) for a semiconductor device includes a first leadframe portion (12) having a perimeter that defines a cavity (16) and a plurality of leads (14) extending inwardly from the perimeter and a first thickness. A second leadframe portion (18) is attached to the first leadframe portion (16). The second leadframe portion (18) has a die paddle (20) received within the cavity (16) of the first leadframe portion (12). The second leadframe portion (18) has a second thickness that is greater than a thickness of the first leadframe portion (12). Such a dual gauge leadframe is suitable especially for high power devices in which the die paddle acts as a heat sink.Type: GrantFiled: August 20, 2003Date of Patent: July 12, 2005Assignee: Freescale Semiconductor, Inc.Inventors: Wai Wong Chow, Zhi-Gang Bai, Clem H. Brown
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Publication number: 20050121756Abstract: A leadframe (20) for a semiconductor device includes a first leadframe portion (12) having a perimeter that defines a cavity (16) and a plurality of leads (14) extending inwardly from the perimeter and a first thickness. A second leadframe portion (18) is attached to the first leadframe portion (16). The second leadframe portion (18) has a die paddle (20) received within the cavity (16) of the first leadframe portion (12). The second leadframe portion (18) has a second thickness that is greater than a thickness of the first leadframe portion (12). Such a dual gauge leadframe is suitable especially for high power devices in which the die paddle acts as a heat sink.Type: ApplicationFiled: January 26, 2005Publication date: June 9, 2005Inventors: Wai Chow, Zhi-Gang Bai, Clem Brown
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Publication number: 20050012183Abstract: A leadframe (20) for a semiconductor device includes a first leadframe portion (12) having a perimeter that defines a cavity (16) and a plurality of leads (14) extending inwardly from the perimeter and a first thickness. A second leadframe portion (18) is attached to the first leadframe portion (16). The second leadframe portion (18) has a die paddle (20) received within the cavity (16) of the first leadframe portion (12). The second leadframe portion (18) has a second thickness that is greater than a thickness of the first leadframe portion (12). Such a dual gauge leadframe is suitable especially for high power devices in which the die paddle acts as a heat sink.Type: ApplicationFiled: August 20, 2003Publication date: January 20, 2005Inventors: Wai Chow, Zhi-Gang Bai, Clem Brown