Abstract: A temperature monitoring system for a substrate heating furnace includes a temperature monitor, and the temperature monitor is located on a prong of a mechanical arm which is configured to fetch and place a substrate. The temperature monitor is configured to monitor the temperature of the substrate which has been heated by the substrate heating furnace and is located on the prong.

Abstract: A mask includes a base substrate, control switches provided on the base substrate, and electrochromic film components provided on the base substrate. The control switches and the electrochromic film components are connected in one-to-one correspondence. The control switches are configured to, according to at least one light shielding region and a light transmitting region of the mask, control light transmittances of the electrochromic film components in one-to-one correspondence.

Abstract: A tank for substrate cleaning, a tank heating apparatus, a tank heating method and a substrate cleaning apparatus are provided. The substrate cleaning tank includes a tank body, a hot waste gas recycle tube, a heater and a heat exchange tube. The hot waste gas recycle tube is used to receive a hot waste gas in a hot waste gas discharge tube of a production line, the heater and the heat exchange tube are used to heat a fluid in the tank body, and the heat exchange tube is communicated with the hot waste gas recycle tube. The hot waste gas is effectively utilized, the power consumption is reduced, the production cost is saved, and the discharge of the hot waste gas is reduced.

Abstract: A mask includes a base substrate, control switches provided on the base substrate, and electrochromic film components provided on the base substrate. The control switches and the electrochromic film components are connected in one-to-one correspondence. The control switches are configured to, according to at least one light shielding region and a light transmitting region of the mask, control light transmittances of the electrochromic film components in one-to-one correspondence.

Abstract: A temperature monitoring system for a substrate heating furnace includes a temperature monitor, and the temperature monitor is located on a prong of a mechanical arm which is configured to fetch and place a substrate. The temperature monitor is configured to monitor the temperature of the substrate which has been heated by the substrate heating furnace and is located on the prong.

Abstract: A tank for substrate cleaning, a tank heating apparatus, a tank heating method and a substrate cleaning apparatus are provided. The substrate cleaning tank includes a tank body, a hot waste gas recycle tube, a heater and a heat exchange tube. The hot waste gas recycle tube is used to receive a hot waste gas in a hot waste gas discharge tube of a production line, the heater and the heat exchange tube are used to heat a fluid in the tank body, and the heat exchange tube is communicated with the hot waste gas recycle tube. The hot waste gas is effectively utilized, the power consumption is reduced, the production cost is saved, and the discharge of the hot waste gas is reduced.

Abstract: An embodiment of the present invention discloses a material management and control system, which comprises: a code scanner, which performs code scanning operation on any material to be warehoused with respect to the material to be warehoused to obtain code scanning parameter information of the material to be warehoused, wherein the code scanning parameter information comprises at least a date when a life of the material to be warehoused is exhausted; and a processor, which determines whether a remaining life of the material to be warehoused is not less than a set life value or not according to the code scanning parameter information obtained by the code scanner, and if a result is yes, then perform warehousing operation on the material to be warehoused, and monitor whether the warehoused material arrives at its corresponding life exhausting date or not, and if the result is not, then perform subsequent material processing operation on the warehoused material according to a set operation procedure.

Abstract: A pull-up resistor circuit is provided for an IC, including a voltage source, a voltage output for providing a first voltage to supply power for providing a second voltage for an input/output (I/O) port of the IC, a first PMOS transistor, a second PMOS transistor and a control signal generator. The first PMOS transistor and the second PMOS transistor are connected in series to provide pull-up resistance, where the first PMOS transistor is coupled to a first control signal to control a pull-up function of the pull-up resistor circuit in a normal mode. Further, the control signal generator is for generating a second control signal coupled to the second PMOS transistor to control a bias voltage of the pull-up resistor circuit to prevent a reverse current from the voltage output to the voltage source under a high-voltage-tolerant mode when the second voltage is higher than the first voltage.

Abstract: An embodiment of the present invention discloses a material management and control system, which comprises: a code scanner, which performs code scanning operation on any material to be warehoused with respect to the material to be warehoused to obtain code scanning parameter information of the material to be warehoused, wherein the code scanning parameter information comprises at least a date when a life of the material to be warehoused is exhausted; and a processor, which determines whether a remaining life of the material to be warehoused is not less than a set life value or not according to the code scanning parameter information obtained by the code scanner, and if a result is yes, then perform warehousing operation on the material to be warehoused, and monitor whether the warehoused material arrives at its corresponding life exhausting date or not, and if the result is not, then perform subsequent material processing operation on the warehoused material according to a set operation procedure.

Abstract: A semiconductor device is provided. The semiconductor device includes a semiconductor substrate and an electrostatic discharge (ESD) protection device disposed on the semiconductor substrate. The ESD protection device includes a source and a drain disposed in the semiconductor substrate, a gate disposed on the semiconductor substrate between the source and the drain, and a p-type doped region disposed in the drain.

Abstract: A pull-up resistor circuit is provided for an IC, including a voltage source, a voltage output for providing a first voltage to supply power for providing a second voltage for an input/output (I/O) port of the IC, a first PMOS transistor, a second PMOS transistor and a control signal generator. The first PMOS transistor and the second PMOS transistor are connected in series to provide pull-up resistance, where the first PMOS transistor is coupled to a first control signal to control a pull-up function of the pull-up resistor circuit in a normal mode. Further, the control signal generator is for generating a second control signal coupled to the second PMOS transistor to control a bias voltage of the pull-up resistor circuit to prevent a reverse current from the voltage output to the voltage source under a high-voltage-tolerant mode when the second voltage is higher than the first voltage.

Abstract: An ESD protection circuit and method for its use are provided. The circuit comprising: a discharge path formed by first and second NMOS transistors which are sequentially connected between a ground and a power supply; an ESD event detection unit; first and second drive units respectively connected between an output of the ESD event detection unit and a gate of the first transistor and between the output of the ESD event detection unit and a gate of the second transistor. The first and second drive units respectively cause the first and second transistors to be turned on during an ESD event and to be turned off when there is no ESD event.

Abstract: An ESD protection circuit and method for its use are provided. The circuit comprising: a discharge path formed by first and second NMOS transistors which are sequentially connected between a ground and a power supply; an ESD event detection unit; first and second drive units respectively connected between an output of the ESD event detection unit and a gate of the first transistor and between the output of the ESD event detection unit and a gate of the second transistor. The first and second drive units respectively cause the first and second transistors to be turned on during an ESD event and to be turned off when there is no ESD event.

Abstract: A mixed chimeric immune system is created for a variety of treatments and techniques. Mixed chimerism is established in a patient without significant risk of graft-versus-host-disease (GVHD) by administering a cell transplant from a donor to a recipient along with a conditioning treatment and an immune blockade treatment.