Patents by Inventor Zhihao Pan
Zhihao Pan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11552071Abstract: Aspects of the present disclosure include one or more semiconductor electrostatic discharge protection devices. At least one embodiment includes a semiconductor electrostatic discharge device with one or more fingers divided into two segments with alternating p-diffusion and n-diffusion regions, with each region being associated with at least one of a portion of a diode and/or silicon-controlled rectifier (SCR).Type: GrantFiled: July 29, 2020Date of Patent: January 10, 2023Assignee: Littelfuse Semiconductor (Wuxi) Co., LtdInventors: Ming-Feng Hsieh, Chih-Chun Lin, Zhihao Pan
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Patent number: 10957685Abstract: A semiconductor device and method of manufacturing a semiconductor device are provided. The semiconductor device includes a semiconductor substrate and a semiconductor layer located on the substrate; at least one shallow trench and at least one deep trench. Each of the at least one shallow trench and the at least one deep trench extending from a first major surface of the semiconductor layer. Sidewall regions and base regions of the trenches comprise a doped trench region and the trenches are at least partially filled with a conductive material contacting the doped region. The shallow trenches terminate in the semiconductor layer and the deep trench terminates in the semiconductor substrate.Type: GrantFiled: October 18, 2018Date of Patent: March 23, 2021Assignee: Nexperia B.V.Inventors: Steffen Holland, Zhihao Pan, Jochen Wynants, Hans-Martin Ritter, Tobias Sprogies, Thomas Igel-Holtzendorff, Wolfgang Schnitt, Joachim Utzig
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Publication number: 20210035970Abstract: Aspects of the present disclosure include one or more semiconductor electrostatic discharge protection devices. At least one embodiment includes a semiconductor electrostatic discharge device with one or more fingers divided into two segments with alternating p-diffusion and n-diffusion regions, with each region being associated with at least one of a portion of a diode and/or silicon-controlled rectifier (SCR).Type: ApplicationFiled: July 29, 2020Publication date: February 4, 2021Applicant: Littelfuse Semiconductor (Wuxi) Co., Ltd.Inventors: Ming-Feng Hsieh, Chih-Chun Lin, Zhihao Pan
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Patent number: 10643941Abstract: A semiconductor device and a method of making the same. The device includes a semiconductor substrate provided in a chip-scale package (CSP). The device also includes a plurality of contacts provided on a major surface of the substrate. The device further includes an electrically floating metal layer forming an ohmic contact on a backside of the semiconductor substrate. The device is operable to conduct a current that passes through the substrate from a first of said plurality of contacts to a second of said plurality of contacts via the metal layer on the backside.Type: GrantFiled: January 5, 2016Date of Patent: May 5, 2020Assignee: Nexperia B.V.Inventors: Zhihao Pan, Friedrich Hahn, Steffen Holland, Olaf Pfennigstorf, Jochen Wynants, Hans-Martin Ritter
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Patent number: 10529644Abstract: A semiconductor device and a method of making the same. The device includes an electrically conductive heat sink having a first surface. The device also includes a semiconductor substrate. The device further includes a first contact located on a first surface of the substrate. The device also includes a second contact located on a second surface of the substrate. The first surface of the substrate is mounted on the first surface of the heat sink for electrical and thermal conduction between the heat sink and the substrate via the first contact. The second surface of the substrate is mountable on a surface of a carrier.Type: GrantFiled: February 22, 2016Date of Patent: January 7, 2020Assignee: Nexperia B.V.Inventors: Shun Tik Yeung, Pompeo Umali, Hans-Juergen Funke, Chi Ho Leung, Wolfgang Schnitt, Zhihao Pan
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Publication number: 20190123037Abstract: A semiconductor device and method of manufacturing a semiconductor device are provided. The semiconductor device includes a semiconductor substrate and a semiconductor layer located on the substrate; at least one shallow trench and at least one deep trench. Each of the at least one shallow trench and the at least one deep trench extending from a first major surface of the semiconductor layer. Sidewall regions and base regions of the trenches comprise a doped trench region and the trenches are at least partially filled with a conductive material contacting the doped region. The shallow trenches terminate in the semiconductor layer and the deep trench terminates in the semiconductor substrate.Type: ApplicationFiled: October 18, 2018Publication date: April 25, 2019Applicant: NEXPERIA B.V.Inventors: Steffen Holland, Zhihao Pan, Jochen Wynants, Hans-Martin Ritter, Tobias Sprogies, Thomas lgel-Holtzendorff, Wolfgang Schnitt, Joachim Utzig
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Publication number: 20160260651Abstract: A semiconductor device and a method of making the same. The device includes an electrically conductive heat sink having a first surface. The device also includes a semiconductor substrate. The device further includes a first contact located on a first surface of the substrate. The device also includes a second contact located on a second surface of the substrate. The first surface of the substrate is mounted on the first surface of the heat sink for electrical and thermal conduction between the heat sink and the substrate via the first contact. The second surface of the substrate is mountable on a surface of a carrier.Type: ApplicationFiled: February 22, 2016Publication date: September 8, 2016Inventors: Shun Tik YEUNG, Pompeo Umali, Hans-Juergen Funke, Chi Ho Leung, Wolfgang Schnitt, Zhihao Pan
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Publication number: 20160218058Abstract: A semiconductor device and a method of making the same. The device includes a semiconductor substrate provided in a chip-scale package (CSP). The device also includes a plurality of contacts provided on a major surface of the substrate. The device further includes an electrically floating metal layer forming an ohmic contact on a backside of the semiconductor substrate. The device is operable to conduct a current that passes through the substrate from a first of said plurality of contacts to a second of said plurality of contacts via the metal layer on the backside.Type: ApplicationFiled: January 5, 2016Publication date: July 28, 2016Inventors: Zhihao Pan, Friedrich Hahn, Steffen Holland, Olaf Pfennigstorf, Jochen Wynants, Hans-Martin Ritter
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Patent number: 9230953Abstract: A semiconductor ESD protection device comprising a vertical arrangement of alternating conductivity type layers, wherein the layers are arranged as silicon controlled rectifier and wherein the silicon controlled rectifier is arranged as vertical device and having top and bottom opposing contacts.Type: GrantFiled: October 17, 2014Date of Patent: January 5, 2016Assignee: NXP B.V.Inventors: Zhihao Pan, Steffen Holland
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Publication number: 20150108536Abstract: A semiconductor ESD protection device comprising a vertical arrangement of alternating conductivity type layers, wherein the layers are arranged as silicon controlled rectifier and wherein the silicon controlled rectifier is arranged as vertical device and having top and bottom opposing contacts.Type: ApplicationFiled: October 17, 2014Publication date: April 23, 2015Inventors: Zhihao Pan, Steffen Holland
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Patent number: 8441031Abstract: Electrostatic discharge (ESD) protection is provided for discharging current between input and output nodes. In accordance with various embodiments, an ESD protection device includes an open-base transistor having an emitter connected to the input node and a collector connected to pass current to the output node via a resistor in response to a voltage at the input node exceeding a threshold that causes the transistor to break down. The resistor is coupled across emitter and collector regions of a second open-base transistor that is configured to turn on for passing current in response to the current across the resistor exceeding a threshold that applies a threshold breakdown voltage across the second transistor. In some implementations, an emitter and/or base of the second transistor are connected to, or are respectively the same region as, a base and a collector of the first transistor.Type: GrantFiled: January 28, 2011Date of Patent: May 14, 2013Assignee: NXP B.V.Inventors: Steffen Holland, Zhihao Pan
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Publication number: 20120193675Abstract: Electrostatic discharge (ESD) protection is provided for discharging current between input and output nodes. In accordance with various embodiments, an ESD protection device includes an open-base transistor having an emitter connected to the input node and a collector connected to pass current to the output node via a resistor in response to a voltage at the input node exceeding a threshold that causes the transistor to break down. The resistor is coupled across emitter and collector regions of a second open-base transistor that is configured to turn on for passing current in response to the current across the resistor exceeding a threshold that applies a threshold breakdown voltage across the second transistor. In some implementations, an emitter and/or base of the second transistor are connected to, or are respectively the same region as, a base and a collector of the first transistor.Type: ApplicationFiled: January 28, 2011Publication date: August 2, 2012Inventors: Steffen Holland, Zhihao Pan