Abstract: Devices with gamma (?) grooves are disclosed. The ? grooves can be used to form optical fiber arrays. The ? grooves can be formed using a dry etch, such as RIE, by modifying resist features of an etch mask to have convex curved sidewalls. The profile of the resist features is transferred to the substrate by the dry etch to form the ? grooves. The ? grooves are formed without K containing etchants, avoiding K+ ions contamination of process tools as well as health issues caused by handling alkali containing devices.

Abstract: A method of forming a wedge-shaped fiber array and a bottom base according to a probing pad layout of a Si-Photonic device to enable optical, DC and RF mixed signal tests to be performed at the same time and the resulting device are provided. Embodiments include a bottom base; and a fiber array with sidewalls and a top surface having a first angle and a second angle, respectively, over the bottom base, wherein the fiber array is structured to expose bond pads of a Si-Photonic device during wafer level Si-Photonic testing.

Abstract: A method of forming a wedge-shaped fiber array and a bottom base according to a probing pad layout of a Si-Photonic device to enable optical, DC and RF mixed signal tests to be performed at the same time and the resulting device are provided. Embodiments include a bottom base; and a fiber array with sidewalls and a top surface having a first angle and a second angle, respectively, over the bottom base, wherein the fiber array is structured to expose bond pads of a Si-Photonic device during wafer level Si-Photonic testing.

Abstract: Devices with gamma (?) grooves are disclosed. The ? grooves can be used to form optical fiber arrays. The ? grooves can be formed using a dry etch, such as RIE, by modifying resist features of an etch mask to have convex curved sidewalls. The profile of the resist features is transferred to the substrate by the dry etch to form the ? grooves. The ? grooves are formed without K containing etchants, avoiding K+ ions contamination of process tools as well as health issues caused by handling alkali containing devices.

Abstract: A system for detection of a photon emission generate by a device of an integrated circuit, and methods for detecting the same are provided. The system includes a device space configured to include the device. The system further includes an electrical probe proximate the device space and configured to couple to the device. The electrical probe is configured to induce the device to generate the photon emission. The system further includes an optical fiber having a first end proximate the device space and a second end spaced from the first end. The first end is configured to receive the photon emission generated by the device. The optical fiber is configured to transmit the photon emission from the first end to the second end. The system further includes a detector in communication with the second end of the optical fiber and configured to detect the photon emission transmitted by the optical fiber.

Abstract: A system for detection of a photon emission generate by a device of an integrated circuit, and methods for detecting the same are provided. The system includes a device space configured to include the device. The system further includes an electrical probe proximate the device space and configured to couple to the device. The electrical probe is configured to induce the device to generate the photon emission. The system further includes an optical fiber having a first end proximate the device space and a second end spaced from the first end. The first end is configured to receive the photon emission generated by the device. The optical fiber is configured to transmit the photon emission from the first end to the second end. The system further includes a detector in communication with the second end of the optical fiber and configured to detect the photon emission transmitted by the optical fiber.

Abstract: A multiple-sample-holder polishing setup for cross-section sample preparation and a method of making a device using the same are presented. The multiple-sample-holder polishing setup includes a frame. The frame has a hollow center, one or more long and short rods and a recess for accommodating a polishing head. The setup includes one or more sample holders. The sample holder is to be attached to the one or more long and short rods of the frame. A paddle is affixed to each sample holder. A sample is attached to the paddle. The sample is coated with a thin epoxy layer prior to polishing thereby allowing for easy inspection for site of interests as well as quick material removal.

Abstract: A method for sharpening a nanotip involving a laser-enhanced chemical etching is provided. The method includes immersing a nanotip in an etchant solution. The nanotip includes a base and an apex, the apex having a diameter smaller than a diameter of the base. The method also includes irradiating the nanotip with laser fluence to establish a temperature gradient in the nanotip along a direction from the apex to the base of the nanotip such that the apex and base are etched at different rates.

Abstract: A multiple-sample-holder polishing setup for cross-section sample preparation and a method of making a device using the same are presented. The multiple-sample-holder polishing setup includes a frame. The frame has a hollow center, one or more long and short rods and a recess for accommodating a polishing head. The setup includes one or more sample holders. The sample holder is to be attached to the one or more long and short rods of the frame. A paddle is affixed to each sample holder. A sample is attached to the paddle. The sample is coated with a thin epoxy layer prior to polishing thereby allowing for easy inspection for site of interests as well as quick material removal.

Abstract: A method for sharpening a nanotip involving a laser-enhanced chemical etching is provided. The method includes immersing a nanotip in an etchant solution. The nanotip includes a base and an apex, the apex having a diameter smaller than a diameter of the base. The method also includes irradiating the nanotip with laser fluence to establish a temperature gradient in the nanotip along a direction from the apex to the base of the nanotip such that the apex and base are etched at different rates.

Abstract: According to an embodiment of the disclosure, a method verifies bitmap information or test data information for a semiconductor device. The method places a defect on a semiconductor device at an actual defect location using a laser to physically damage the semiconductor device. A logical address associated with the defect is detected and bitmap information or test data information is reviewed to determine an expected location corresponding to the logical address. Then, the accuracy of the bitmap information or the test data information is determined by comparing the actual defect location with the expected location. A deviation between the two indicates an inaccuracy.

Abstract: A method for manufacturing an integrated circuit system includes: providing a first material; forming a second material over a first side of the first material; and exposing a second side of the first material to an energy source to form an electrical contact at an interface of the first material and the second material.

Abstract: According to an embodiment of the disclosure, a method verifies bitmap information or test data information for a semiconductor device. The method places a defect on a semiconductor device at an actual defect location using a laser to physically damage the semiconductor device. A logical address associated with the defect is detected and bitmap information or test data information is reviewed to determine an expected location corresponding to the logical address. Then, the accuracy of the bitmap information or the test data information is determined by comparing the actual defect location with the expected location. A deviation between the two indicates an inaccuracy.

Abstract: A method for manufacturing an integrated circuit system includes: providing a first material; forming a second material over a first side of the first material; and exposing a second side of the first material to an energy source to form an electrical contact at an interface of the first material and the second material.

Abstract: The invention relates to a method and apparatus for decapping integrated circuit packages. The invention involves irradiating an IC package with laser radiation, typically in the UV-IR spectra and of short pulse duration. The irradiation results in ablation of the molding compound. The invention also provides real-time monitoring and process control of the decapping process and fluid-flow removal of ablation debris. Using the invention, decapping can be performed without causing damage to the internal IC structure. Furthermore, decapping in a liquid can prevent oxidization of the molding compound by ambient air.

Abstract: For temperature cycling at a material of an IC (integrated circuit) package, a laser beam is directed to the material such that the material absorbs the laser beam to become heated. A laser controller adjusts at least one property of the laser beam until the temperature of the material reaches a predetermined high-end temperature. The present invention may be used for a flip-chip IC package with the laser beam being directed toward a back-side of an IC die that is exposed on the IC package. In that case, the laser beam is comprised of light having a wavelength that is within a transmission region of a semiconductor material of the IC die such that the laser beam reaches the material on the front side of the IC die.

Abstract: A test circuit for and method of testing integrated circuit packages can be utilized to determine the existence of one or more short circuits between adjacent connectors. The system includes an interface configured to electrically connect the conductors of the integrated circuit package. The interface groups the conductors into a plurality of nodes. The number of nodes is no more than one-half the number of conductors. A control circuit is coupled to the interface. The control circuit determines the existence of one or more short circuits between adjacent conductors in response to signals on the nodes.

Abstract: The invention relates to a method and apparatus for decapping integrated circuit packages. The invention involves irradiating an IC package with laser radiation, typically in the UV-IR spectra and of short pulse duration. The irradiation results in ablation of the molding compound. The invention also provides real-time monitoring and process control of the decapping process and fluid-flow removal of ablation debris. Using the invention, decapping can be performed without causing damage to the internal IC structure. Furthermore, decapping in a liquid can prevent oxidisation of the molding compound by ambient air.