Patents by Inventor Zhihua GE

Zhihua GE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11905822
    Abstract: An online measurement method for temperature stability of production layers in an oil and gas well includes: obtaining a plurality of temperature data at each position point of an optical fiber; according to the temperature data, calculating temperature standard deviations of each position point within a production layer at a plurality of time points; performing probability distribution statistics according to the temperature standard deviations at all position points of the production layer at a same time point, fitting a probability distribution curve according to normal distribution, and obtaining a probability density function; obtaining the temperature standard deviations corresponding to at least one value that integral values of the probability density function at all position points of the production layer at each time point is between (0, 1), generating a standard temperature deviation normal distribution probability time curve of each section of the production layer according to the temperature stan
    Type: Grant
    Filed: January 4, 2021
    Date of Patent: February 20, 2024
    Assignee: GUOXING HUIJIN SHENZHEN TECHNOLOGY CO., LTD.
    Inventors: Zhihua Ge, Shuai Guan, Chuntao Song, Wuhua Zhou, Yuehua Chen
  • Patent number: 11880689
    Abstract: A server power-down detection method and system, a device, and a storage medium are disclosed, wherein the method includes: in response to the completion of hardware power on, controlling a PCH to read BIOS codes from BIOS flash storage particles via a first interface and running the BIOS codes; detecting whether bits of a register of the PCH have been set; in response to the bits of the register of the PCH being set, controlling the PCH to send power-down completion information to a BMC via a second interface; and in response to the BMC receiving the power-down completion information, recording the power-down completion information in BMC flash storage particles, and performing the hardware power on again until a test is completed.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: January 23, 2024
    Inventors: Haibo Wang, Zhihua Ge
  • Patent number: 11741037
    Abstract: A single-level single-line full-duplex bus communication method and system are disclosed. The method includes: transmitting, by a first signal transceiver, data according to a first internal transmitter clock F1, simultaneously monitoring a level change on a bus, and parsing received data; transmitting, by a second signal transceiver, data according to a second internal transmitter clock F2, simultaneously monitoring the level change on the bus, and parsing received data; and communicating between the first and second signal transceivers by means of a single line, wherein the first and second transmitter clocks satisfy a relationship: F1>F2*(length of data unit+2). The system achieves single-level single-line full-duplex communication by using different coding formats and different internal transmitter clocks, whereby the number of signal lines can be reduced, single-level communication can be achieved by using universal digital levels, i.e., 0, 1, and the hardware implementation difficulty can be reduced.
    Type: Grant
    Filed: February 25, 2021
    Date of Patent: August 29, 2023
    Assignee: INSPUR SUZHOU INTELLIGENT TECHNOLOGY CO., LTD.
    Inventor: Zhihua Ge
  • Publication number: 20230229451
    Abstract: A server power-down detection method and system, a device, and a storage medium are disclosed, wherein the method includes: in response to the completion of hardware power on, controlling a PCH to read BIOS codes from BIOS flash storage particles via a first interface and running the BIOS codes; detecting whether bits of a register of the PCH have been set; in response to the bits of the register of the PCH being set, controlling the PCH to send power-down completion information to a BMC via a second interface; and in response to the BMC receiving the power-down completion information, recording the power-down completion information in BMC flash storage particles, and performing the hardware power on again until a test is completed.
    Type: Application
    Filed: July 30, 2021
    Publication date: July 20, 2023
    Inventors: Haibo WANG, Zhihua GE
  • Patent number: 11644502
    Abstract: A circuit and a method for reducing interference of power on/off to hardware test. The circuit includes: a power unit, a voltage processing unit, a PSU and a to-be-tested hardware. An input terminal of the voltage processing unit is connected to the power unit, an output terminal of the voltage processing unit is connected to an input terminal of the PSU, and an output terminal of the PSU is connected to the to-be-tested hardware; the power unit is configured to provide an operating voltage; the voltage processing unit is configured to eliminate electric sparks caused by instability of the operating voltage at an instant of power on/off; the PSU is configured to convert a stable operating voltage outputted from the voltage processing unit into a direct current voltage required for the to-be-tested hardware; and the to-be-tested hardware is configured to receive the direct current voltage outputted from the PSU.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: May 9, 2023
    Assignee: ZHENGZHOU YUNHAI INFORMATION TECHNOLOGY CO., LTD.
    Inventor: Zhihua Ge
  • Publication number: 20230089760
    Abstract: A single-level single-line full-duplex bus communication method and system are disclosed. The method includes: transmitting, by a first signal transceiver, data according to a first internal transmitter clock F1, simultaneously monitoring a level change on a bus, and parsing received data; transmitting, by a second signal transceiver, data according to a second internal transmitter clock F2, simultaneously monitoring the level change on the bus, and parsing received data; and communicating between the first and second signal transceivers by means of a single line, wherein the first and second transmitter clocks satisfy a relationship: F1>F2*(length of data unit+2). The system achieves single-level single-line full-duplex communication by using different coding formats and different internal transmitter clocks, whereby the number of signal lines can be reduced, single-level communication can be achieved by using universal digital levels, i.e., 0, 1, and the hardware implementation difficulty can be reduced.
    Type: Application
    Filed: February 25, 2021
    Publication date: March 23, 2023
    Inventor: Zhihua GE
  • Publication number: 20220010663
    Abstract: An online measurement method for temperature stability of production layers in an oil and gas well includes: obtaining a plurality of temperature data at each position point of an optical fiber; according to the temperature data, calculating temperature standard deviations of each position point within a production layer at a plurality of time points; performing probability distribution statistics according to the temperature standard deviations at all position points of the production layer at a same time point, fitting a probability distribution curve according to normal distribution, and obtaining a probability density function; obtaining the temperature standard deviations corresponding to at least one value that integral values of the probability density function at all position points of the production layer at each time point is between (0, 1), generating a standard temperature deviation normal distribution probability time curve of each section of the production layer according to the temperature stan
    Type: Application
    Filed: January 4, 2021
    Publication date: January 13, 2022
    Inventors: Zhihua GE, Shuai GUAN, Chuntao SONG, Wuhua ZHOU, Yuehua CHEN
  • Publication number: 20220011174
    Abstract: A temperature measuring method of distributed multi-section optical fibers, a system and a storage medium are provided.
    Type: Application
    Filed: January 4, 2021
    Publication date: January 13, 2022
    Inventors: Zhihua GE, Shuai GUAN, Wuhua ZHOU, Yuehua CHEN
  • Publication number: 20210247444
    Abstract: A circuit and a method for reducing interference of power on/off to hardware test. The circuit includes: a power unit, a voltage processing unit, a PSU and a to-be-tested hardware. An input terminal of the voltage processing unit is connected to the power unit, an output terminal of the voltage processing unit is connected to an input terminal of the PSU, and an output terminal of the PSU is connected to the to-be-tested hardware; the power unit is configured to provide an operating voltage; the voltage processing unit is configured to eliminate electric sparks caused by instability of the operating voltage at an instant of power on/off; the PSU is configured to convert a stable operating voltage outputted from the voltage processing unit into a direct current voltage required for the to-be-tested hardware; and the to-be-tested hardware is configured to receive the direct current voltage outputted from the PSU.
    Type: Application
    Filed: June 27, 2019
    Publication date: August 12, 2021
    Applicant: ZHENGZHOU YUNHAI INFORMATION TECHNOLOGY CO., LTD.
    Inventor: Zhihua GE