Patents by Inventor Zhijie YUAN

Zhijie YUAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230146223
    Abstract: The present invention discloses a nucleic acids extraction system and method based on a 3D-printed microdevice, and belongs to the technical field of nucleic acids extraction. The nucleic acids extraction system is a monomer 3D-printed microdevice or a 3D-printed microdevice prepared by 3D printing technologies, the monomer 3D-printed microdevice comprises a nucleic acids binding region and a handle region, and the 3D-printed microdevice is composed of more than two monomer 3D-printed microdevices through a joining region; and the nucleic acids binding region is made of photosensitive resin or thermoplastic. An extraction method for the nucleic acids extraction system based on a 3D-printed microdevice is used to bind, clean and elute nucleic acids by moving the monomer 3D-printed microdevice or the 3D-printed microdevice among a solution containing target nucleic acids, a washing buffer and an elution buffer.
    Type: Application
    Filed: June 18, 2021
    Publication date: May 11, 2023
    Inventors: Xiaobin JIANG, Peipei LI, Menghang LI, Zhijie YUAN, Gaohong HE, Wu XIAO, Xiangcun LI, Xuemei WU
  • Patent number: 11280826
    Abstract: An analog-circuit fault diagnosis method based on continuous wavelet analysis and an ELM network comprises: data acquisition: performing data sampling on output responses of an analog circuit respectively through Multisim simulation to obtain an output response data set; feature extraction: performing continuous wavelet analysis by taking the output response data set of the circuit as training and testing data sets respectively to obtain a wavelet time-frequency coefficient matrix, dividing the coefficient matrix into eight sub-matrixes of the same size, and performing singular value decomposition on the sub-matrixes to calculate a Tsallis entropy for each sub-matrix to form feature vectors of corresponding faults; and fault classification: submitting the feature vector of each sample to the ELM network to implement accurate and quick fault classification.
    Type: Grant
    Filed: January 6, 2017
    Date of Patent: March 22, 2022
    Assignee: HEFEI UNIVERSITY OF TECHNOLOGY
    Inventors: Yigang He, Wei He, Qiwu Luo, Zhigang Li, Tiancheng Shi, Tao Wang, Zhijie Yuan, Deqin Zhao, Luqiang Shi, Liulu He
  • Publication number: 20200300907
    Abstract: An analog-circuit fault diagnosis method based on continuous wavelet analysis and an ELM network comprises: data acquisition: performing data sampling on output responses of an analog circuit respectively through Multisim simulation to obtain an output response data set; feature extraction: performing continuous wavelet analysis by taking the output response data set of the circuit as training and testing data sets respectively to obtain a wavelet time-frequency coefficient matrix, dividing the coefficient matrix into eight sub-matrixes of the same size, and performing singular value decomposition on the sub-matrixes to calculate a Tsallis entropy for each sub-matrix to form feature vectors of corresponding faults; and fault classification: submitting the feature vector of each sample to the ELM network to implement accurate and quick fault classification.
    Type: Application
    Filed: January 6, 2017
    Publication date: September 24, 2020
    Applicant: HEFEI UNIVERSITY OF TECHNOLOGY
    Inventors: Yigang HE, Wei HE, Qiwu LUO, Zhigang LI, Tiancheng SHI, Tao WANG, Zhijie YUAN, Deqin ZHAO, Luqiang SHI, Liulu HE
  • Patent number: 10706332
    Abstract: An analog circuit fault mode classification method comprises the following implementation steps: (1) collecting M groups of voltage signal sample vectors Vij to each of fault modes Fi of the analog circuit by using a data collection board; (2) sequentially extracting fault characteristic vectors VijF of the voltage signal sample vectors Vij by using subspace projection; (3) standardizing the extracted fault characteristic vectors VijF to obtain standardized fault characteristic vectors; (4) constructing a fault mode classifier based on a support vector machine, inputting the standardized fault characteristic vectors, performing learning and training on the classifier, and determining structure parameters of the classifier; and (5) completing determination of fault modes according to fault mode determination rules. The fault mode classifier of the present invention is simple in learning and training and reliable in mode classification accuracy.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: July 7, 2020
    Assignee: HEFEI UNIVERSITY OF TECHNOLOGY
    Inventors: Lifen Yuan, Shuai Luo, Yigang He, Peng Chen, Chaolong Zhang, Ying Long, Zhen Cheng, Zhijie Yuan, Deqin Zhao
  • Patent number: 10539613
    Abstract: An analog circuit fault diagnosis method using a single testable node comprises the following steps: (1) obtaining prior sample data vectors under each fault mode; (2) computing a statistical average of the prior sample data vectors under each of the fault modes; (3) decomposing a signal by an orthogonal Haar wavelet filter set; (4) extracting the feature factor of the prior sample fault modes; (5) extracting a fault-mode-to-be-tested feature factor; (6) computing a correlation coefficient matrix and correlation metric parameters between the feature factor of the prior sample fault modes and the feature factor of the fault-mode-to-be-tested; and (7) determining a fault mode according to a maximal correlation principle by comparing the correlation metric parameters.
    Type: Grant
    Filed: November 25, 2015
    Date of Patent: January 21, 2020
    Assignee: HEFEI UNIVERSITY OF TECHNOLOGY
    Inventors: Yigang He, Lifen Yuan, Lei Wu, Yesheng Sun, Chaolong Zhang, Ying Long, Zhen Cheng, Zhijie Yuan, Deqin Zhao
  • Patent number: 10110026
    Abstract: A wireless sensor network sensor network charging method for multi-charge nodes, including the following steps: (1) establishing a WSNs model; (2) dividing field ranges of charging trolleys; and (3) charging the charging trolleys: (a) initializing: l=0 and j=0, wherein l is the total number of received alarm nodes, and j is the serial number of an alarmed node; (b) receiving an alarm signal, updating values of l and j, generating a shortest charging path sl, and computing an energy discriminate vector; (c) if a vector element satisfies Qlj?5% B and j=1, 2, . . .
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: October 23, 2018
    Assignee: HEFEI UNIVERSITY OF TECHNOLOGY
    Inventors: Lifen Yuan, Peng Chen, Yigang He, Shuai Luo, Zhijie Yuan, Zhen Cheng, Deqin Zhao, Yesheng Sun, Lei Wu
  • Publication number: 20180038909
    Abstract: An analog circuit fault diagnosis method using a single testable node comprises the following steps: (1) obtaining prior sample data vectors under each fault mode; (2) computing a statistical average of the prior sample data vectors under each of the fault modes; (3) decomposing a signal by an orthogonal Haar wavelet filter set; (4) extracting the feature factor of the prior sample fault modes; (5) extracting a fault-mode-to-be-tested feature factor; (6) computing a correlation coefficient matrix and correlation metric parameters between the feature factor of the prior sample fault modes and the feature factor of the fault-mode-to-be-tested; and (7) detennining a fault mode according to a maximal correlation principle by comparing the correlation metric parameters.
    Type: Application
    Filed: November 25, 2015
    Publication date: February 8, 2018
    Applicant: HEFEI UNIVERSITY OF TECHNOLOGY
    Inventors: Yigang HE, Lifen YUAN, Lei WU, Yesheng SUN, Chaolong ZHANG, Ying LONG, Zhen CHENG, Zhijie YUAN, Deqin ZHAO
  • Publication number: 20180039865
    Abstract: An analog circuit fault mode classification method comprises the following implementation steps: (1) collecting M groups of voltage signal sample vectors Vij to each of fault modes Fi of the analog circuit by using a data collection board; (2) sequentially extracting fault characteristic vectors VijF of the voltage signal sample vectors Vij by using subspace projection; (3) standardizing the extracted fault characteristic vectors VijF to obtain standardized fault characteristic vectors; (4) constructing a fault mode classifier based on a support vector machine, inputting the standardized fault characteristic vectors, performing learning and training on the classifier, and determining structure parameters of the classifier; and (5) completing determination of fault modes according to fault mode determination rules. The fault mode classifier of the present invention is simple in learning and training and reliable in mode classification accuracy.
    Type: Application
    Filed: November 24, 2015
    Publication date: February 8, 2018
    Applicant: HEFEI UNIVERSITY OF TECHNOLOGY
    Inventors: Lifen YUAN, Shuai LUO, Yigang HE, Peng CHEN, Chaolong ZHANG, Ying LONG, Zhen CHENG, Zhijie YUAN, Deqin ZHAO
  • Publication number: 20170353044
    Abstract: A wireless sensor network sensor network charging method for multi-charge nodes, including the following steps: (1) establishing a WSNs model; (2) dividing field ranges of charging trolleys; and (3) charging the charging trolleys: (a) initializing: l=0 and j=0, wherein l is the total number of received alarm nodes, and j is the serial number of an alarmed node; (b) receiving an alarm signal, updating values of l and j, generating a shortest charging path sl, and computing an energy discriminate vector; (c) if a vector element satisfies Qlj?5% B and j=1, 2, . . .
    Type: Application
    Filed: November 24, 2015
    Publication date: December 7, 2017
    Applicant: HEFEI UNIVERSITY OF TECHNOLOGY
    Inventors: Lifen YUAN, Peng CHEN, Yigang HE, Shuai LUO, Zhijie YUAN, Zhen CHENG, Deqin ZHAO, Yesheng SUN, Lei WU