Patents by Inventor Zhijun JIANG
Zhijun JIANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240134911Abstract: Computer-implemented methods, apparatus, and systems for data storage and data query are described. During data storage, the number of neighboring graph nodes in each starting graph node in directed graph graph data to be stored is determined, and a data storage mode is determined according to the number of neighboring graph nodes. When the data storage mode is not an ultra-large node data storage, node data, neighbor information, outgoing edge index feature information, and outgoing edge data of the starting graph node are stored in the same data fragment. When the data storage mode is an ultra-large node data storage, node data, neighbor information, outgoing edge index feature range information, and outgoing edge data are stored in a starting graph node data fragment, and the outgoing edge data and outgoing edge data storage address information of the starting graph node are stored in at least two outgoing edge data fragments.Type: ApplicationFiled: December 29, 2023Publication date: April 25, 2024Applicant: Alipay (Hangzhou) Information Technology Co., Ltd.Inventors: Songqing Zhang, Jin Jiang, Zhijun Fu, Bingpeng Zhu, Lin Yuan
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Publication number: 20240126817Abstract: A query request is received for querying graph data, including a filtering condition for an attribute value of a first attribute, and used to query a destination edge in a neighboring edge of a first node that satisfies the filtering condition. Graph data includes point data of the first node and edge data of a neighboring edge stored in a single-point data block corresponding to the first node and comprising index data of the edge data used to index a first attribute of the edge data, record the attribute value of the first attribute, and record a storage location of an edge corresponding to the attribute value of the first attribute in the single-point data block. Using the index data and filtering condition, a storage location of the destination edge in the single-point data block is determined and data of the destination edge obtained.Type: ApplicationFiled: December 28, 2023Publication date: April 18, 2024Applicant: Alipay (Hangzhou) Information Technology Co., Ltd.Inventors: Lin Yuan, Jin Jiang, Zhijun Fu, Bingpeng Zhu
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Patent number: 11940425Abstract: A comprehensive two-dimensional gas chromatograph, comprising a sample injector, a primary dimension column, a two-position three-way valve, a secondary dimension column, a three-way tube, a heating oven and a detector, wherein an inlet end(s) of the sample injector is connected to a carrier gas line and as well to a sample line, and an outlet end thereof is connected to a first end of the primary dimension column, a second end of the primary dimension column is connected to a first branch of the three-way tube, a second branch of the T-union is connected to a first end of the secondary dimension column, a second end of the secondary dimension column is connected to an inlet of the detector, a third branch of the three-way tube is connected to a gas inlet of the two-position three-way valve, and a first gas outlet of the two-position three-way valve is connected to the carrier gas line.Type: GrantFiled: July 19, 2019Date of Patent: March 26, 2024Assignee: Nanjing Nine Max Instrument Co. Ltd.Inventors: Xiaosheng Guan, Zhijun Zhao, Hai Jiang
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Patent number: 11898249Abstract: A method of processing a substrate according to a PECVD process is described. Temperature profile of the substrate is adjusted to change deposition rate profile across the substrate. Plasma density profile is adjusted to change deposition rate profile across the substrate. Chamber surfaces exposed to the plasma are heated to improve plasma density uniformity and reduce formation of low quality deposits on chamber surfaces. In situ metrology may be used to monitor progress of a deposition process and trigger control actions involving substrate temperature profile, plasma density profile, pressure, temperature, and flow of reactants.Type: GrantFiled: February 13, 2023Date of Patent: February 13, 2024Assignee: Applied Materials, Inc.Inventors: Nagarajan Rajagopalan, Xinhai Han, Michael Wenyoung Tsiang, Masaki Ogata, Zhijun Jiang, Juan Carlos Rocha-Alvarez, Thomas Nowak, Jianhua Zhou, Ramprakash Sankarakrishnan, Amit Kumar Bansal, Jeongmin Lee, Todd Egan, Edward W. Budiarto, Dmitriy Panasyuk, Terrance Y. Lee, Jian J. Chen, Mohamad A. Ayoub, Heung Lak Park, Patrick Reilly, Shahid Shaikh, Bok Hoen Kim, Sergey Starik, Ganesh Balasubramanian
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Publication number: 20230411462Abstract: Exemplary semiconductor structures and processing methods may include forming a first portion of a first semiconductor layer characterized by a first etch rate for an etch treatment, forming a second portion of the first semiconductor layer characterized by a second etch rate that is less than the first etch rate for the etch treatment, and forming a third portion of the first semiconductor layer characterized by a third etch rate that is greater than the second etch rate. The processing methods may further include etching an opening through the first semiconductor layer, where the opening has a height and a width, and where the opening is characterized by a variation in the width between a midpoint of the height of the opening and an endpoint of the opening that is less than or about 5 ?.Type: ApplicationFiled: September 1, 2023Publication date: December 21, 2023Applicant: Applied Materials, Inc.Inventors: Akhil Singhal, Allison Yau, Sang-Jin Kim, Zeqiong Zhao, Zhijun Jiang, Deenesh Padhi, Ganesh Balasubramanian
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Patent number: 11837448Abstract: Examples disclosed herein relate to a method and apparatus for cleaning and repairing a substrate support having a heater disposed therein. A method includes (a) cleaning a surface of a substrate support having a bulk layer, the substrate support is disposed in a processing environment configured to process substrates. The cleaning process includes forming a plasma at a high temperature from a cleaning gas mixture having a fluorine containing gas and oxygen. The method includes (b) removing oxygen radicals from the processing environment with a treatment plasma formed from a treatment gas mixture. The treatment gas mixture includes the fluorine containing gas. The method further includes (c) repairing an interface of the substrate support and the bulk layer with a post-treatment plasma. The post-treatment plasma is formed from a post-treatment gas mixture including a nitrogen containing gas. The high temperature is greater than or equal to about 500 degrees Celsius.Type: GrantFiled: April 27, 2021Date of Patent: December 5, 2023Assignee: Applied Materials, Inc.Inventors: Shuran Sheng, Lin Zhang, Jiyong Huang, Jang Seok Oh, Joseph C. Werner, Nitin Khurana, Ganesh Balasubramanian, Jennifer Y. Sun, Xinhai Han, Zhijun Jiang
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Patent number: 11784229Abstract: Exemplary semiconductor structures and processing methods may include forming a first portion of a first semiconductor layer characterized by a first etch rate for an etch treatment, forming a second portion of the first semiconductor layer characterized by a second etch rate that is less than the first etch rate for the etch treatment, and forming a third portion of the first semiconductor layer characterized by a third etch rate that is greater than the second etch rate. The processing methods may further include etching an opening through the first semiconductor layer, where the opening has a height and a width, and where the opening is characterized by a variation in the width between a midpoint of the height of the opening and an endpoint of the opening that is less than or about 5 ?.Type: GrantFiled: October 16, 2020Date of Patent: October 10, 2023Assignee: Applied Materials, Inc.Inventors: Akhil Singhal, Allison Yau, Sang-Jin Kim, Zeqiong Zhao, Zhijun Jiang, Deenesh Padhi, Ganesh Balasubramanian
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Publication number: 20230274968Abstract: Semiconductor processing systems and method are described that may include flowing deposition precursors into a substrate processing region of a semiconductor processing chamber, where the substrate processing region includes an electrostatic chuck. The methods may further include depositing a seasoning layer on the electrostatic chuck from the deposition precursors to form a seasoned electrostatic chuck. The seasoning layer may be characterized by a dielectric constant greater than or about 3.5. The methods may still further include applying a voltage to the seasoned electrostatic chuck of greater than or about 500 V. The seasoned electrostatic chuck may be characterized by a leakage current of less than or about 25 mA when the voltage is applied.Type: ApplicationFiled: May 5, 2023Publication date: August 31, 2023Applicant: Applied Materials, Inc.Inventors: Akhil Singhal, Allison Yau, Zeqiong Zhao, Sang-Jin Kim, Zhijun Jiang, Deenesh Padhi, Ganesh Balasubramanian
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Publication number: 20230193466Abstract: A method of processing a substrate according to a PECVD process is described. Temperature profile of the substrate is adjusted to change deposition rate profile across the substrate. Plasma density profile is adjusted to change deposition rate profile across the substrate. Chamber surfaces exposed to the plasma are heated to improve plasma density uniformity and reduce formation of low quality deposits on chamber surfaces. In situ metrology may be used to monitor progress of a deposition process and trigger control actions involving substrate temperature profile, plasma density profile, pressure, temperature, and flow of reactants.Type: ApplicationFiled: February 13, 2023Publication date: June 22, 2023Inventors: Nagarajan RAJAGOPALAN, Xinhai HAN, Michael Wenyoung TSIANG, Masaki OGATA, Zhijun JIANG, Juan Carlos ROCHA-ALVAREZ, Thomas NOWAK, Jianhua ZHOU, Ramprakash SANKARAKRISHNAN, Amit Kumar BANSAL, Jeongmin LEE, Todd EGAN, Edward W. BUDIARTO, Dmitriy PANASYUK, Terrance Y. LEE, Jian J. CHEN, Mohamad A. AYOUB, Heung Lak PARK, Patrick REILLY, Shahid SHAIKH, Bok Hoen KIM, Sergey STARIK, Ganesh BALASUBRAMANIAN
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Patent number: 11646216Abstract: Semiconductor processing systems and method are described that may include flowing deposition precursors into a substrate processing region of a semiconductor processing chamber, where the substrate processing region includes an electrostatic chuck. The methods may further include depositing a seasoning layer on the electrostatic chuck from the deposition precursors to form a seasoned electrostatic chuck. The seasoning layer may be characterized by a dielectric constant greater than or about 3.5. The methods may still further include applying a voltage to the seasoned electrostatic chuck of greater than or about 500 V. The seasoned electrostatic chuck may be characterized by a leakage current of less than or about 25 mA when the voltage is applied.Type: GrantFiled: October 16, 2020Date of Patent: May 9, 2023Assignee: Applied Materials, Inc.Inventors: Akhil Singhal, Allison Yau, Zeqiong Zhao, Sang-Jin Kim, Zhijun Jiang, Deenesh Padhi, Ganesh Balasubramanian
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Publication number: 20230094475Abstract: Disclosed in the present invention is a system and method for supplying acetylene to an apparatus using acetylene, the system having at least one acetylene storage apparatus and an acetylene content analysis apparatus. The system and method disclosed in the present invention can utilize the capacity of an acetylene cylinder to a higher degree; before the solvent impurity concentration in acetylene gas reaches a level where it is no longer suitable, a more accurate understanding of the usable acetylene amount in the acetylene storage apparatus can be gained through detection, thereby reducing the number of times that the acetylene storage apparatus is refilled and replaced, and lowering the user's total costs.Type: ApplicationFiled: September 28, 2022Publication date: March 30, 2023Inventors: Zhijun JIANG, Qingqing Zhu
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Patent number: 11613812Abstract: A method of processing a substrate according to a PECVD process is described. Temperature profile of the substrate is adjusted to change deposition rate profile across the substrate. Plasma density profile is adjusted to change deposition rate profile across the substrate. Chamber surfaces exposed to the plasma are heated to improve plasma density uniformity and reduce formation of low quality deposits on chamber surfaces. In situ metrology may be used to monitor progress of a deposition process and trigger control actions involving substrate temperature profile, plasma density profile, pressure, temperature, and flow of reactants.Type: GrantFiled: September 3, 2020Date of Patent: March 28, 2023Assignee: Applied Materials, Inc.Inventors: Nagarajan Rajagopalan, Xinhai Han, Michael Wenyoung Tsiang, Masaki Ogata, Zhijun Jiang, Juan Carlos Rocha-Alvarez, Thomas Nowak, Jianhua Zhou, Ramprakash Sankarakrishnan, Amit Kumar Bansal, Jeongmin Lee, Todd Egan, Edward Budiarto, Dmitriy Panasyuk, Terrance Y. Lee, Jian J. Chen, Mohamad A. Ayoub, Heung Lak Park, Patrick Reilly, Shahid Shaikh, Bok Hoen Kim, Sergey Starik, Ganesh Balasubramanian
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Publication number: 20220344135Abstract: Examples disclosed herein relate to a method and apparatus for cleaning and repairing a substrate support having a heater disposed therein. A method includes (a) cleaning a surface of a substrate support having a bulk layer, the substrate support is disposed in a processing environment configured to process substrates. The cleaning process includes forming a plasma at a high temperature from a cleaning gas mixture having a fluorine containing gas and oxygen. The method includes (b) removing oxygen radicals from the processing environment with a treatment plasma formed from a treatment gas mixture. The treatment gas mixture includes the fluorine containing gas. The method further includes (c) repairing an interface of the substrate support and the bulk layer with a post-treatment plasma. The post-treatment plasma is formed from a post-treatment gas mixture including a nitrogen containing gas. The high temperature is greater than or equal to about 500 degrees Celsius.Type: ApplicationFiled: April 27, 2021Publication date: October 27, 2022Inventors: Shuran SHENG, Lin ZHANG, Jiyong HUANG, Jang Seok OH, Joseph C. WERNER, Nitin KHURANA, Ganesh BALASUBRAMANIAN, Jennifer Y. SUN, Xinhai HAN, Zhijun JIANG
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Publication number: 20220336216Abstract: Exemplary deposition methods may include delivering a silicon-containing precursor and an inert gas to a processing region of a semiconductor processing chamber. The methods may include providing a hydrogen-containing precursor with the silicon-containing precursor and the inert gas. The methods may include forming a plasma of all precursors within the processing region of a semiconductor processing chamber. The methods may include depositing a silicon-containing material on a substrate disposed within the processing region of the semiconductor processing chamber. The processing region may be maintained free of helium delivery during the deposition method.Type: ApplicationFiled: April 20, 2021Publication date: October 20, 2022Applicant: Applied Materials, Inc.Inventors: Zeqiong Zhao, Allison Yau, Sang-Jin Kim, Akhil Singhal, Zhijun Jiang, Deenesh Padhi, Ganesh Balasubramanian
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Patent number: 11430641Abstract: Exemplary methods of semiconductor processing may include forming a plasma of a fluorine-containing precursor. The methods may include performing a chamber clean in a processing region of a semiconductor processing chamber. The processing region may be at least partially defined between a faceplate and a substrate support. The methods may include generating aluminum fluoride during the chamber clean. The methods may include contacting surfaces within the processing region with a carbon-containing precursor. The methods may include volatilizing aluminum fluoride from the surfaces of the processing region.Type: GrantFiled: July 2, 2021Date of Patent: August 30, 2022Assignee: Applied Materials, Inc.Inventors: Vivien Chua, Prashant Kumar Kulshreshtha, Zhijun Jiang, Fang Ruan, Diwakar Kedlaya
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Publication number: 20220122872Abstract: Semiconductor processing systems and method are described that may include flowing deposition precursors into a substrate processing region of a semiconductor processing chamber, where the substrate processing region includes an electrostatic chuck. The methods may further include depositing a seasoning layer on the electrostatic chuck from the deposition precursors to form a seasoned electrostatic chuck. The seasoning layer may be characterized by a dielectric constant greater than or about 3.5. The methods may still further include applying a voltage to the seasoned electrostatic chuck of greater than or about 500 V. The seasoned electrostatic chuck may be characterized by a leakage current of less than or about 25 mA when the voltage is applied.Type: ApplicationFiled: October 16, 2020Publication date: April 21, 2022Applicant: Applied Materials, Inc.Inventors: Akhil Singhal, Allison Yau, Zeqiong Zhao, Sang-Jin Kim, Zhijun Jiang, Deenesh Padhi, Ganesh Balasubramanian
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Publication number: 20220123114Abstract: Exemplary semiconductor structures and processing methods may include forming a first portion of a first semiconductor layer characterized by a first etch rate for an etch treatment, forming a second portion of the first semiconductor layer characterized by a second etch rate that is less than the first etch rate for the etch treatment, and forming a third portion of the first semiconductor layer characterized by a third etch rate that is greater than the second etch rate.Type: ApplicationFiled: October 16, 2020Publication date: April 21, 2022Applicant: Applied Materials, Inc.Inventors: Akhil Singhal, Allison Yau, Sang-Jin Kim, Zeqiong Zhao, Zhijun Jiang, Deenesh Padhi, Ganesh Balasubramanian
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Publication number: 20220020570Abstract: Exemplary semiconductor processing systems may include a processing chamber including a lid stack having an output manifold. The systems may include a gas panel. The systems may include an input manifold. The input manifold may fluidly couple the gas panel with the output manifold of the processing chamber. A delivery line may extend from the input manifold to the output manifold. The systems may include a first transmission line extending from a first set of precursor sources of the gas panel to the delivery line. The systems may include a second transmission line extending from a second set of precursor sources of the gas panel to the delivery line. The second transmission line may be switchably coupled between the delivery line and an exhaust of the semiconductor processing system.Type: ApplicationFiled: July 19, 2020Publication date: January 20, 2022Applicant: Applied Materials, Inc.Inventors: Sai Susmita Addepalli, Yue Chen, Abhigyan Keshri, Qiang Ma, Zhijun Jiang, Shailendra Srivastava, Daemian Raj Benjamin Raj, Ganesh Balasubramanian
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Patent number: 11145504Abstract: A method of forming a film stack with reduced defects is provided and includes positioning a substrate on a substrate support within a processing chamber and sequentially depositing polysilicon layers and silicon oxide layers to produce the film stack on the substrate. The method also includes supplying a current of greater than 5 ampere (A) to a plasma profile modulator while generating a deposition plasma within the processing chamber, exposing the substrate to the deposition plasma while depositing the polysilicon layers and the silicon oxide layers, and maintaining the processing chamber at a pressure of greater than 2 Torr to about 100 Torr while depositing the polysilicon layers and the silicon oxide layers.Type: GrantFiled: October 9, 2019Date of Patent: October 12, 2021Assignee: Applied Materials, Inc.Inventors: Zhijun Jiang, Ganesh Balasubramanian, Arkajit Roy Barman, Hidehiro Kojiri, Xinhai Han, Deenesh Padhi, Chuan Ying Wang, Yue Chen, Daemian Raj Benjamin Raj, Nikhil Sudhindrarao Jorapur, Vu Ngoc Tran Nguyen, Miguel S. Fung, Jose Angelo Olave, Thian Choi Lim
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Publication number: 20210047730Abstract: Exemplary semiconductor processing chambers may include a showerhead. The chambers may also include a substrate support characterized by a first surface facing the showerhead. The first surface may be configured to support a semiconductor substrate. The substrate support may define a recessed pocket centrally located within the first surface. The recessed pocket may be defined by an outer radial wall characterized by a height from the first surface within the recessed pocket that is greater than or about 150% of a thickness of the semiconductor substrate.Type: ApplicationFiled: August 6, 2020Publication date: February 18, 2021Applicant: Applied Materials, Inc.Inventors: Sai Susmita Addepalli, Yue Chen, Zhijun Jiang, Shailendra Srivastava, Nikhil Sudhindrarao Jorapur, Daemian Raj Benjamin Raj, Greg Chichkanoff, Qiang Ma, Abhigyan Keshri, Xinhai Han, Ganesh Balasubramanian, Deenesh Padhi