Abstract: A display substrate has a fan-out area and includes a plurality of conductive layers. The plurality of conductive layers include data lines, connection lines and fan-out lines. A connection line is electrically connected to a first data line, and crosses at least one data line and is insulated from the crossed data line. A first fan-out line is electrically connected to the connection line. A second fan-out line is electrically connected to a second data line. The first fan-out line includes a transfer line, and is located in a different conductive layer from second fan-out lines and crosses at least one second fan-out line. An order of arrangement of ends of the fan-out lines away from the display area in a first direction is same as an order of arrangement of the data lines in the first direction.

Abstract: Display substrate, method for manufacturing the same, and display device are disclosed. The display substrate comprises: a base substrate comprising a display region and a peripheral region located at a periphery of the display region, the display region comprises at least two display sub-regions; the display substrate further comprises scanning lines and sub-pixels, wherein the scanning lines comprise first scanning lines comprising at least two scanning line segments independent from each other, and the at least two scanning line segments are located in different display sub-regions; and the sub-pixels are divided into rows of sub-pixels, the rows of sub-pixels comprise a target row of sub-pixels which is divided into at least two sub-pixel groups located in different display sub-regions, and the scanning line segment is coupled to each sub-pixel in a corresponding sub-pixel group belonging to a same display sub-region.

Abstract: Provided is a display panel. The display panel includes: a base substrate having a display region and a peripheral region surrounding the display region; a plurality of pixel units disposed in the display region and including a light-emitting unit; a barrier structure disposed in the peripheral region and surrounding the plurality of pixel units; a connecting structure disposed in the peripheral region; a first insulating layer disposed between the first electrode layer and the base substrate, wherein a via hole is formed in a portion of the first insulating layer in the peripheral region; a circuit structure disposed in the peripheral region and including a first circuit structure; a second insulating layer disposed on a side of the second metal layer; and a third insulating layer disposed on a side of the second insulating layer and including a body pattern.

Abstract: A driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit and an output circuit; the driving signal generation circuit generates and outputs the Nth stage of driving signal; the gating circuit controls to write the gating input signal into the first node; the output control circuit performs a NAND operation on the Nth stage of driving signal and the potential of the second terminal of the output control circuit to obtain a first output signal; the output circuit inverts the first output signal to obtain and provide an output driving signal through the output driving terminal; N is a positive integer.

Abstract: A driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit, a voltage control circuit and an output circuit; the driving signal generation circuit generates the Nth stage of driving signal; the gating circuit writes a gating input signal into the first node under the control of a gating control signal; the output control circuit connects the first control node and the second node under the control of a potential of the first node; the voltage control circuit controls a potential of the second node according to the potential of the first node; the output circuit connects the output driving terminal and the first voltage terminal under the control of the potential of the second node, and connects the output driving terminal and the second voltage terminal under the control of the potential of the second control node; N is a positive integer.

Abstract: A display panel and a display device are disclosed. The display panel includes: a touch electrode, at least located in the display region; and a touch trace, electrically connected with the touch electrode, and disposed on a side of the dam structure away from the base substrate; where the touch trace includes a first trace portion, and an orthographic projection of at least a part of the first trace portion on the base substrate overlaps with an orthographic projection of the first dam portion on the base substrate; the first trace portion comprises at least one first trace sub-portion having an average width of a first width, and at least one second trace sub-portion having an average width of a second width, where the first width is less than the second width.

Abstract: In a method for playing a first game video, a video playing interface is displayed in a game application. Preview information of at least one game video of a game video library is displayed. The preview information includes description information that is determined based on an account tag of a user account and content of the first game video from the at least one game video. The account tag is determined based on game play activity information of the user account associated with the game application. Based on a user operation performed on the first game video from the at least one game video, the first game video is played in the video playing interface. Apparatus and non-transitory computer-readable storage medium counterpart embodiments are also contemplated.

Abstract: A memory device includes a substrate, a stack over the substrate, and a gate line slit extending along a first direction and dividing the stack into two portions. The stack includes a connection portion that connects the two portions of the stack. The connection portion includes at least two sub-connection portions along a second direction perpendicular to the first direction. The gate line slit includes at least two portions along the first direction. Each sub-connection portion is between adjacent two portions of the gate line slit.

Abstract: A thyristor regulation circuit for a high-voltage light-emitting diode (LED) strip light includes: a live wire input terminal, a neutral wire input terminal, a full-bridge rectifier module, a first group of LED circuit modules, a second group of LED circuit modules, a third group of LED circuit modules, a first thyristor chip, a second thyristor chip and a third thyristor chip. The LED strip light includes a plurality of minimum LED strip light units, the minimum LED strip light units are arranged in parallel, and each of the minimum LED strip light units includes the thyristor regulation circuit for a high-voltage LED strip light. In the thyristor regulation circuit, an external bulky power supply is omitted, and an LED strip light is directly connected to the mains electricity for use, thereby reducing the installation difficulty; and the present disclosure is compatible with existing thyristor dimming circuits.

Abstract: A thyristor regulation circuit for a high-voltage light-emitting diode (LED) strip light includes: a live wire input terminal, a neutral wire input terminal, a full-bridge rectifier module, a first group of LED circuit modules, a second group of LED circuit modules, a third group of LED circuit modules, a first thyristor chip, a second thyristor chip and a third thyristor chip. The LED strip light includes a plurality of minimum LED strip light units, the minimum LED strip light units are arranged in parallel, and each of the minimum LED strip light units includes the thyristor regulation circuit for a high-voltage LED strip light. In the thyristor regulation circuit, an external bulky power supply is omitted, and an LED strip light is directly connected to the mains electricity for use, thereby reducing the installation difficulty; and the present disclosure is compatible with existing thyristor dimming circuits.

Abstract: An LED strip that can be bent in three-dimensional space of the invention includes a printed circuit board, and at least one hole is opened in the printed circuit board. The opening of the holes does not affect the conductivity of the printed circuit board but reduces the mechanical stress of the printed circuit board, thereby the printed circuit board or the LED strip can be bent in three-dimensional space without being destroyed. The installation problem in three-dimensional spaces is solved, in other words, the difficulty of the installation of the LED strip is decreased, so that, a space design with the LED strips can be made better, the performance of the LED strips is improved, and the application field of the LED strips is expanded.

Abstract: A quickly connectable plug and socket for power connection of electrical lighting apparatus comprising a male plug which is capable to be inserted and connected with a female socket; conductive contact pieces are provided in the female socket; conductive pins are provided on the male plug; at least two resilient claws are arranged along a circumference of a cavity of an insertion portion of the female socket; each resilient claw is provided with first teeth axially arranged in a column with respect to the female socket; outer circumferential surface of an insertion portion of the male plug is provided with second teeth corresponding to the first teeth and arranged axially in columns with respect to the male plug; the insertion portion of the female socket is also provided with a position limiting groove; a position limiting button corresponding to the position limiting groove is provided on the male plug.

Abstract: A quickly connectable plug and socket for power connection of electrical lighting apparatus comprising a male plug which is capable to be inserted and connected with a female socket; conductive contact pieces are provided in the female socket; conductive pins are provided on the male plug; at least two resilient claws are arranged along a circumference of a cavity of an insertion portion of the female socket; each resilient claw is provided with first teeth axially arranged in a column with respect to the female socket; outer circumferential surface of an insertion portion of the male plug is provided with second teeth corresponding to the first teeth and arranged axially in columns with respect to the male plug; the insertion portion of the female socket is also provided with a position limiting groove; a position limiting button corresponding to the position limiting groove is provided on the male plug.