Abstract: A digital radio receiver system uses a dual mode automatic gain control architecture and method to enhance signal-to-noise ratio and linearity to accommodate reception and processing of both L-band RF signals and band-III RF signals. The system architecture employs an analog AGC to control high/low gain switches associated with front end low noise amplifiers and down converters, as well as a digital AGC to control gain controlled amplifier and programmable gain amplifier gain settings. The AGC control can be implemented totally within the system architecture or optionally can be implemented via an external data processing device such as a DSP or micro-controller.

Abstract: A single capacitor (C) can be used for both readout and noise reduction in an imaging sensor. This dual-purpose use of the single capacitor is facilitated by a switching arrangement (&PHgr;1-&PHgr;5) which connects the capacitor to a low impedance node (n7, n41) during charge storage. The low impedance node is also used to drive a column readout line (Vout).

Abstract: The pixels of an image sensor array can be readout (84, 85) in m×n blocks (m, n) that are compatible with the operation of a desired image compression algorithm (14), thereby reducing the amount of memory required by the image compression algorithm.

Abstract: A CMOS area array sensor with reduced fixed pattern noise. Device threshold voltage variations are minimied using a Sequential Correlated Double Sampling technique in a column circuitry.