Abstract: A calibration apparatus for calibrating a transceiver includes a loop back circuit, an estimation circuit, and a calibration circuit. The loop back circuit is coupled between a mixer output port of a transmitter (Tx) of the transceiver and a mixer input port of a receiver (Rx) of the transceiver, and applies a sequence of different loop gains. The estimation circuit receives a loop back receiving signal that is output from the Rx under the sequence of different loop gains, and generates at least one estimated value of impairment of the transceiver by performing channel estimation according to at least the loop back receiving signal. The calibration circuit performs calibration upon the transceiver according to the at least one estimated value.

Abstract: Methods and apparatus for enhancement of authentication. A method performed by a communication device may comprise sending a first request to a communication equipment, wherein the request comprises a communication device identifier of the communication device. The method may further comprise receiving a first response from the communication equipment, the first response comprising one or more parameters. The method may further comprise generating a first key and a second key based on the received response; The method may further comprise sending a second request to the communication equipment, the second request comprising the first key and a message based on the second key.

Abstract: Embodiments of the present disclosure relates to a method, and an apparatus for dynamic QoS characteristics query in mobile network. The method performed by a first network node in a communication network may comprise: receiving a request about QoS information for a terminal device. The method may further comprise: determining the QoS information for the terminal device, based at least on a location of the terminal device and/or a network status. The method may further comprise: transmitting a response including the determined QoS information. According embodiments of the present disclosure, it is possible for the UE or other server node to obtain information about currently available QoS. It will take full advantage of network resources and UE could avoid meaningless retry operations.

Abstract: An electronic device and a method for reducing power consumption of signal transmission in the electronic device are provided. The electronic device may include a source circuit, a destination circuit, at least one transmission wire and at least one resonance wire, wherein the at least one transmission wire is coupled between at least one output terminal of the source circuit and at least one input terminal of the destination circuit, and the at least one resonance wire is coupled to the at least one input terminal of the destination circuit and is routed along the at least one transmission wire. In specific, the source circuit is configured to output an oscillation signal having an oscillation frequency, the destination circuit is configured to receive the oscillation signal, wherein the at least one transmission wire is configured to transmit the oscillation signal from the source circuit to the destination circuit.

Abstract: A gain equalizer and a method for controlling a tunable gain of the gain equalizer are provided. The gain equalizer includes a common source stage and a switch array. The common source stage is configured to apply the tunable gain to an input signal, in order to generate an amplified signal. The common source stage includes input transistors and cascode transistors, wherein the cascode transistors are respectively coupled to the input transistors. The input transistors are configured to receive the input signal via gate terminals of the input transistors, respectively, and the cascode transistors are configured to output the amplified signal via drain terminals of the cascode transistors, respectively. In addition, the switch array is coupled between respective source terminals of the cascode transistors, wherein the tunable gain is controlled according to an equivalent impedance of the switch array.

Abstract: A variable gain low noise amplifier (LNA) and a method for controlling a gain of the variable gain LNA are provided. The variable gain LNA may include a first transistor, a first degeneration inductor, a second transistor and a second degeneration inductor, wherein the first degeneration inductor is coupled to a source terminal of the first transistor, and the second degeneration inductor is coupled to a source terminal of the second transistor. Gate terminals of the first transistor and the second transistor are configured to receive an input signal. The first transistor and the first degeneration inductor belong to a first branch of the variable gain LNA, and the second transistor and the second degeneration inductor belong to a second branch of the variable gain LNA. More particularly, a gain of the variable gain LNA is determined by controlling whether to turn off the second branch.

Abstract: An electronic device and a method for reducing power consumption of signal transmission in the electronic device are provided. The electronic device may include a source circuit, a destination circuit, at least one transmission wire and at least one resonance wire, wherein the at least one transmission wire is coupled between at least one output terminal of the source circuit and at least one input terminal of the destination circuit, and the at least one resonance wire is coupled to the at least one input terminal of the destination circuit and is routed along the at least one transmission wire. In specific, the source circuit is configured to output an oscillation signal having an oscillation frequency, the destination circuit is configured to receive the oscillation signal, wherein the at least one transmission wire is configured to transmit the oscillation signal from the source circuit to the destination circuit.

Abstract: Methods and apparatus for enhancement of authentication. A method performed by a communication device may comprise sending a first request to a communication equipment, wherein the request comprises a communication device identifier of the communication device. The method may further comprise receiving a first response from the communication equipment, the first response comprising one or more parameters. The method may further comprise generating a first key and a second key based on the received response; The method may further comprise sending a second request to the communication equipment, the second request comprising the first key and a message based on the second key.

Abstract: Some embodiments relate to a device, comprising an amplifier and a linearizer, the linearizer comprising a first transistor, the first transistor comprising a first terminal coupled to an input of the amplifier, a second terminal configured to be coupled to a DC supply voltage, and a control terminal configured to control a current flowing between the first and second terminals and configured to receive a DC bias voltage different from a voltage of the first terminal. Some embodiments relate to a device, comprising an amplifier, comprising an input, an output, and a first set of one or more transistors coupled between the input and the output, and a linearizer, comprising a second set of one or more transistors coupled between a DC supply voltage and the input of the amplifier, wherein the first set of transistors and the second set of transistors have a same topology.

Abstract: Some embodiments relate to a device, comprising an amplifier and a linearizer, the linearizer comprising a first transistor, the first transistor comprising a first terminal coupled to an input of the amplifier, a second terminal configured to be coupled to a DC supply voltage, and a control terminal configured to control a current flowing between the first and second terminals and configured to receive a DC bias voltage different from a voltage of the first terminal. Some embodiments relate to a device, comprising an amplifier, comprising an input, an output, and a first set of one or more transistors coupled between the input and the output, and a linearizer, comprising a second set of one or more transistors coupled between a DC supply voltage and the input of the amplifier, wherein the first set of transistors and the second set of transistors have a same topology.

Abstract: A power amplifier cell includes a first input arranged to receive an in-phase control signal, a second input arranged to receive a quadrature control signal, an input stage arranged to output a drive signal based at least partly on the received in-phase and quadrature control signals, and an output stage arranged to receive at an input thereof the drive signal output by the input stage, and to generate an output signal for the power amplifier cell in response to the received drive signal.

Abstract: A power amplifier cell includes a first input arranged to receive an in-phase control signal, a second input arranged to receive a quadrature control signal, an input stage arranged to output a drive signal based at least partly on the received in-phase and quadrature control signals, and an output stage arranged to receive at an input thereof the drive signal output by the input stage, and to generate an output signal for the power amplifier cell in response to the received drive signal.

Abstract: A power amplifier cell includes a first input arranged to receive an in-phase control signal, a second input arranged to receive a quadrature control signal, an input stage arranged to output a drive signal based at least partly on the received in-phase and quadrature control signals, and an output stage arranged to receive at an input thereof the drive signal output by the input stage, and to generate an output signal for the power amplifier cell in response to the received drive signal.

Abstract: A phased-array transceiver includes: a plurality of antennas; a plurality of transceiving elements respectively coupled to the plurality of antennas; a signal processing block; and a first distributed network, coupled between the signal processing block and the transceiving elements, wherein the transceiving elements, the signal processing block, and the first distributed network are configured as a single chip, and a first transceiving path between one of the plurality of transceiving elements and the signal processing block and a second transceiving path between another of the plurality of transceiving elements and the signal processing block share at least partial signal traces of the first distributed network.

Abstract: A phased-array transceiver includes: a plurality of antennas; a plurality of transceiving elements respectively coupled to the plurality of antennas; a signal processing block; and a first distributed network, coupled between the signal processing block and the transceiving elements, wherein the transceiving elements, the signal processing block, and the first distributed network are configured as a single chip, and a first transceiving path between one of the plurality of transceiving elements and the signal processing block and a second transceiving path between another of the plurality of transceiving elements and the signal processing block share at least partial signal traces of the first distributed network.

Abstract: A phase-arrayed device includes: a signal processing circuit arranged to generate a specific signal; a first phase-arrayed channel arranged to provide a first phase-arrayed signal according to the specific signal; a first conducting path arranged to conduct the specific signal to the first phase-arrayed channel; a second conducting path arranged to conduct the first phase-arrayed signal to the signal processing circuit; and a detecting circuit, arranged to detect a mismatch between the first phase-arrayed signal and a reference signal to generate a detecting signal utilized for calibrating the first phase-arrayed signal.

Abstract: A power amplifier cell includes a first input arranged to receive an in-phase control signal, a second input arranged to receive a quadrature control signal, an input stage arranged to output a drive signal based at least partly on the received in-phase and quadrature control signals, and an output stage arranged to receive at an input thereof the drive signal output by the input stage, and to generate an output signal for the power amplifier cell in response to the received drive signal.

Abstract: An apparatus for performing power detection includes a squarer module and a calibration module that is coupled to the squarer module, where the squarer module includes a first squarer and a second squarer. The first squarer is arranged to convert an input signal of the squarer module into a first squarer output signal. In addition, the second squarer is arranged to output a second squarer output signal while a predetermined voltage level is input into an input terminal of the second squarer. Additionally, the calibration module is arranged to compare a difference between the first squarer output signal and the second squarer output signal with a reference signal to generate a comparison signal, and to compensate the difference according to the comparison signal, so as to perform a calibration on the apparatus. A method for performing power detection is also provided, and can be performed by utilizing the apparatus.

Abstract: An apparatus for performing power detection includes a squarer module and a calibration module that is coupled to the squarer module, where the squarer module includes a first squarer and a second squarer. The first squarer is arranged to convert an input signal of the squarer module into a first squarer output signal. In addition, the second squarer is arranged to output a second squarer output signal while a predetermined voltage level is input into an input terminal of the second squarer. Additionally, the calibration module is arranged to compare a difference between the first squarer output signal and the second squarer output signal with a reference signal to generate a comparison signal, and to compensate the difference according to the comparison signal, so as to perform a calibration on the apparatus. A method for performing power detection is also provided, and can be performed by utilizing the apparatus.

Abstract: A phase-arrayed device includes: a signal processing circuit arranged to generate a specific signal; a first phase-arrayed channel arranged to provide a first phase-arrayed signal according to the specific signal; a first conducting path arranged to conduct the specific signal to the first phase-arrayed channel; a second conducting path arranged to conduct the first phase-arrayed signal to the signal processing circuit; and a detecting circuit, arranged to detect a mismatch between the first phase-arrayed signal and a reference signal to generate a detecting signal utilized for calibrating the first phase-arrayed signal.