Patents by Inventor Zhi-Ming Lin

Zhi-Ming Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11930174
    Abstract: A method and apparatus for block partition are disclosed. If a cross-colour component prediction mode is allowed, the luma block and the chroma block are partitioned into one or more luma leaf blocks and chroma leaf blocks. If a cross-colour component prediction mode is allowed, whether to enable an LM (Linear Model) mode for a target chroma leaf block is determined based on a first split type applied to an ancestor chroma node of the target chroma leaf block and a second split type applied to a corresponding ancestor luma node. According to another method, after the luma block and the chroma block are partitioned using different partition tress, determine whether one or more exception conditions to allow an LM for a target chroma leaf block are satisfied when the chroma partition tree uses a different split type, a different partition direction, or both from the luma partition tree.
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: March 12, 2024
    Assignee: HFI INNOVATION INC.
    Inventors: Chia-Ming Tsai, Tzu-Der Chuang, Chih-Wei Hsu, Ching-Yeh Chen, Zhi-Yi Lin
  • Patent number: 11246443
    Abstract: A secure containing device with an adjustable volume for receiving and safeguarding items includes a bag, a rear cover, a mounting element connected to opposite sides of the bag, a lock assembly on the rear cover and protruding toward the mounting element, and an active element overlapping with the mounting element. When the mounting element moves to a closed position, the bag is compressed. When the mounting element moves to an unfolded position away from the rear cover, the bag presents a containing space. When the mounting element is in the unfolded position, the active element is movable and rotatable relative to the mounting element to cover a top of the bag and engage with the lock assembly.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: February 15, 2022
    Assignee: NANNING FUGUI PRECISION INDUSTRIAL CO., LTD.
    Inventor: Zhi-Ming Lin
  • Publication number: 20200352377
    Abstract: A secure containing device with an adjustable volume for receiving and safeguarding items includes a bag, a rear cover, a mounting element connected to opposite sides of the bag, a lock assembly on the rear cover and protruding toward the mounting element, and an active element overlapping with the mounting element. When the mounting element moves to a closed position, the bag is compressed. When the mounting element moves to an unfolded position away from the rear cover, the bag presents a containing space. When the mounting element is in the unfolded position, the active element is movable and rotatable relative to the mounting element to cover a top of the bag and engage with the lock assembly.
    Type: Application
    Filed: April 20, 2020
    Publication date: November 12, 2020
    Inventor: ZHI-MING LIN
  • Patent number: 8519876
    Abstract: An ADC with comparing circuit units is provided. Each comparing circuit unit comprises a first resistor, a second resistor, and a CMOS. The first and second resistors provide first and second level voltages, respectively. The base of the PMOS is electrically connected to the power source and the base of the NMOS is connected to the source of the NMOS. The signal input port is located at the gate of the CMOS and receives an analog signal. The first level port of the CMOS is located at the source of the NMOS and receives the first level voltage. The second level port of the CMOS is located at the source of the PMOS and receives the second level voltage. The signal output port of the CMOS is located at the drain and outputs a digital signal.
    Type: Grant
    Filed: March 27, 2012
    Date of Patent: August 27, 2013
    Assignee: National Changhua University of Education
    Inventor: Zhi-Ming Lin
  • Publication number: 20120319882
    Abstract: An ADC with comparing circuit units is provided. Each comparing circuit unit comprises a first resistor, a second resistor, and a CMOS. The first and second resistors provide first and second level voltages, respectively. The base of the PMOS is electrically connected to the power source and the base of the NMOS is connected to the source of the NMOS. The signal input port is located at the gate of the CMOS and receives an analog signal. The first level port of the CMOS is located at the source of the NMOS and receives the first level voltage. The second level port of the CMOS is located at the source of the PMOS and receives the second level voltage. The signal output port of the CMOS is located at the drain and outputs a digital signal.
    Type: Application
    Filed: March 27, 2012
    Publication date: December 20, 2012
    Applicant: NATIONAL CHANGHUA UNIVERSITY OF EDUCATION
    Inventor: Zhi-Ming LIN
  • Patent number: 7761268
    Abstract: A non-linear transient analysis module and method for phase locked loop (PLL) is disclosed. The method includes a pulse cycle defined by the larger period of two input frequencies; a pulse width defined by the accumulation value of period difference. Each pulse cycle is divided into two linear regions, a first voltage at the beginning of the pulse cycle as an initial value then applying a first linear equation to obtain a second voltage, and then the second voltage as an initial value then applying a second linear equation to obtain a third voltage which is used to be an initial value for next pulse cycle. An average voltage of the first region and the second region is inputted into the VCO to generate an output as the PFD input. The aforementioned steps are repeated to complete a simulation of PLL transient response.
    Type: Grant
    Filed: May 2, 2007
    Date of Patent: July 20, 2010
    Assignee: National Changua University of Education
    Inventor: Zhi-Ming Lin
  • Publication number: 20080275679
    Abstract: A non-linear transient analysis module and method for phase locked loop (PLL) is disclosed. The method includes a pulse cycle defined by the larger period of two input frequencies; a pulse width defined by the accumulation value of period difference. Each pulse cycle is divided into two linear regions, a first voltage at the beginning of the pulse cycle as an initial value then applying a first linear equation to obtain a second voltage, and then the second voltage as an initial value then applying a second linear equation to obtain a third voltage which is used to be an initial value for next pulse cycle. An average voltage of the first region and the second region is inputted into the VCO to generate an output as the PFD input. The aforementioned steps are repeated to complete a simulation of PLL transient response.
    Type: Application
    Filed: May 2, 2007
    Publication date: November 6, 2008
    Applicant: NATIONAL CHANGHUA UNIVERSITY OF EDUCATION
    Inventor: Zhi-Ming Lin