Patents by Inventor Zhining Li
Zhining Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11495898Abstract: Connector paddle cards are provided with an improved wiring connection geometry that reduces impedance mismatch. One illustrative embodiment is a printed circuit board having, on at least one surface: edge connector traces arranged along a first edge for contacting electrical conductors in a socket connector; an outer set of electrodes arranged parallel to a second edge for attaching exposed ends of sheathed wires in a cable (“outer wires”); and an inner set of electrodes arranged parallel to the second edge for attaching exposed ends of sheathed wires in a cable (“inner wires”), with the electrodes in the inner set being staggered relative to the electrodes in the outer set.Type: GrantFiled: January 11, 2021Date of Patent: November 8, 2022Assignee: Credo Technology Group LimitedInventors: Xike Liu, Zhining Li, Xiangxiang Ye, Gaige Mei
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Patent number: 11345941Abstract: This application relates to biological pharmacy and biochemical engineering, and more particularly to a method of preparing a (S)-1-benzyl-1,2,3,4,5,6,7,8-octahydroisoquinoline compound. This method includes: subjecting a 1-benzyl-1,2,3,4,5,6,7,8-octahydroisoquinoline raceme as a substrate to selective oxidation in the presence of a monoamine oxidase and the non-selective reduction to prepare the (S)-1-benzyl-1,2,3,4,5,6,7,8-octahydroisoquinoline compound, where the monoamine oxidase has an amino acid sequence as shown in SEQ ID NO: 1 or an amino acid sequence having an identity of more than 80% with SEQ ID NO: 1. The kinetic resolution is carried out in the presence of the monoamine oxidase as a catalyst and a reductant, and the resulting product has a high chiral purity.Type: GrantFiled: February 29, 2020Date of Patent: May 31, 2022Assignee: FUDAN UNIVERSITYInventors: Fener Chen, Zedu Huang, Zhining Li, Jiaqi Wang
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Patent number: 11299451Abstract: A method for synthesizing 2-(1-cyclohexenyl)ethylamine. Cyclohexanone (II) is reacted with a Grignard reagent in a first organic solvent to produce 1-vinylcyclohexanol (III), which is then subjected to chlorination and rearrangement reaction with a chlorinating reagent in a second organic solvent in the presence of an organic base to synthesize (2-chloroethylmethylene)cyclolxane (IV). Then (2-chloroethylmethylene)cyclohexane (IV) and urotropine are subjected to quaternization in a third organic solvent to synthesize N-cyclohexylidene ethyl urotropine hydrochloride (V). Finally, the N-cyclohexylidene ethyl urotropine hydrochloride (V) undergoes hydrolysis and rearrangement reaction in a solvent in the presence of an inorganic mineral acid to synthesize 2-(1-cyclohexenyl)ethylamine (I).Type: GrantFiled: November 19, 2020Date of Patent: April 12, 2022Assignee: Fudan UniversityInventors: Fener Chen, Dang Cheng, Zedu Huang, Zhining Li, Meifen Jiang, Yuan Tao
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Publication number: 20220002224Abstract: A method for synthesizing 2-(1-cyclohexenyl)ethylamine. Cyclohexanone (II) is reacted with a Grignard reagent in a first organic solvent to produce 1-vinylcyclohexanol (III), which is then subjected to chlorination and rearrangement reaction with a chlorinating reagent in a second organic solvent in the presence of an organic base to synthesize (2-chloroethylmethylene)cyclolxane (IV). Then (2-chloroethylmethylene)cyclohexane (IV) and urotropine are subjected to quaternization in a third organic solvent to synthesize N-cyclohexylidene ethyl urotropine hydrochloride (V). Finally, the N-cyclohexylidene ethyl urotropine hydrochloride (V) undergoes hydrolysis and rearrangement reaction in a solvent in the presence of an inorganic mineral acid to synthesize 2-(1-cyclohexenyl)ethylamine (I).Type: ApplicationFiled: November 19, 2020Publication date: January 6, 2022Inventors: Fener CHEN, Dang CHENG, Zedu HUANG, Zhining LI, Meifen JIANG, Yuan TAO
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Publication number: 20210280996Abstract: Connector paddle cards are provided with an improved wiring connection geometry that reduces impedance mismatch. One illustrative embodiment is a printed circuit board having, on at least one surface: edge connector traces arranged along a first edge for contacting electrical conductors in a socket connector; an outer set of electrodes arranged parallel to a second edge for attaching exposed ends of sheathed wires in a cable (“outer wires”); and an inner set of electrodes arranged parallel to the second edge for attaching exposed ends of sheathed wires in a cable (“inner wires”), with the electrodes in the inner set being staggered relative to the electrodes in the outer set.Type: ApplicationFiled: January 11, 2021Publication date: September 9, 2021Applicant: Credo Technology Group LimitedInventors: Xike LIU, Zhining LI, Xiangxiang YE, Gaige MEI
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Publication number: 20210087595Abstract: This application relates to biological pharmacy and biochemical engineering, and more particularly to a method of preparing a (S)-1-benzyl-1,2,3,4,5,6,7,8-octahydroisoquinoline compound. This method includes: subjecting a 1-benzyl-1,2,3,4,5,6,7,8-octahydroisoquinoline raceme as a substrate to selective oxidation in the presence of a monoamine oxidase and the non-selective reduction to prepare the (S)-1-benzyl-1,2,3,4,5,6,7,8-octahydroisoquinoline compound, where the monoamine oxidase has an amino acid sequence as shown in SEQ ID NO: 1 or an amino acid sequence having an identity of more than 80% with SEQ ID NO: 1. The kinetic resolution is carried out in the presence of the monoamine oxidase as a catalyst and a reductant, and the resulting product has a high chiral purity.Type: ApplicationFiled: February 29, 2020Publication date: March 25, 2021Inventors: Fener CHEN, Zedu HUANG, Zhining LI, Jiaqi WANG
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Patent number: 10526622Abstract: The present disclosure relates to the technical field of biochemical engineering and particularly discloses a preparation method for (R)-3-hydroxyl-5-hexenoate. In the method of the present disclosure, the (R)-3-hydroxyl-5-hexenoate is prepared by catalytic reduction of 3-carbonyl-5-hexenoate by ketoreductase with 3-carbonyl-5-hexenoate as the substrate. The amino acid sequence of ketoreductase is shown in SEQ ID NO.1. In the present disclosure, the (R)-3-hydroxyl-5-hexenoate having a very high chiral purity is obtained by asymmetric reduction by ketoreductase as the biocatalyst. The present disclosure has the advantages of easy operation, mild reaction conditions, high reaction yield and good practical industrial application value.Type: GrantFiled: January 14, 2018Date of Patent: January 7, 2020Assignee: Fudan UniversityInventors: Fener Chen, Zedu Huang, Ge Meng, Minjie Liu, Zhining Li, Zexu Wang, Haihui Peng, Fangjun Xiong, Yan Wu, Yuan Tao
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Publication number: 20180340196Abstract: The present disclosure relates to the technical field of biochemical engineering and particularly discloses a preparation method for (R)-3-hydroxyl-5-hexenoate. In the method of the present disclosure, the (R)-3-hydroxyl-5-hexenoate is prepared by catalytic reduction of 3-carbonyl-5-hexenoate by ketoreductase with 3-carbonyl-5-hexenoate as the substrate. The amino acid sequence of ketoreductase is shown in SEQ ID NO.1. In the present disclosure, the (R)-3-hydroxyl-5-hexenoate having a very high chiral purity is obtained by asymmetric reduction by ketoreductase as the biocatalyst. The present disclosure has the advantages of easy operation, mild reaction conditions, high reaction yield and good practical industrial application value.Type: ApplicationFiled: January 14, 2018Publication date: November 29, 2018Inventors: Fener CHEN, Zedu HUANG, Ge MENG, Minjie LIU, Zhining LI, Zexu WANG, Haihui PENG, Fangjun XIONG, Yan WU, Yuan TAO
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Publication number: 20150325240Abstract: Inputting speech includes receiving feature information obtained by a client, the feature information comprising speech signals and user feature image signals, recognizing first candidate recognition data matching the user feature image signals, determining target recognition data based at least on the first candidate recognition data, and outputting the target recognition data.Type: ApplicationFiled: May 4, 2015Publication date: November 12, 2015Inventor: Zhining Li
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Publication number: 20150302515Abstract: Embodiments of the present application relate to a method and system for operating simulation of an object. The method includes receiving, from a first user, a first request to operate a simulation, wherein the first request to operate the simulation has information associated therewith, the information associated with the first request to operate the simulation including an indication of an object, searching for a second user based at least in part on the information associated with the first request to operate the simulation, sending, to the second user, a second request to operate the simulation associated with the object, receiving, from the second user, a result of the simulation in accordance with the second request to operate the simulation, and sending, to the first user, the result of the simulation.Type: ApplicationFiled: April 17, 2015Publication date: October 22, 2015Inventor: Zhining Li
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Publication number: 20110281398Abstract: Embodiments of the present invention include a method of packaging semiconductor devices. The method comprises the steps of molding a surface of a wafer, sawing the wafer into individual devices, attaching the individual semiconductor device to an adhesive surface, molding the exposed surface, and sawing the wafer into individual semiconductor devices. The step of molding forms a continuous molded layer. The step of sawing results in each individual semiconductor having a molded layer. This molded layer corresponds to a portion of the continuous molded layer. The step of attaching includes attaching the molded layer of the individual semiconductor devices to the adhesive surface. The step of molding the exposed area includes molding an exposed area above the adhesive surface. This forms a solid expanse of material. The step of sawing the wafer into individual semiconductor devices includes sawing the solid expanse of material.Type: ApplicationFiled: July 21, 2011Publication date: November 17, 2011Inventors: Xiaochun Tan, Zhining Li, Xiaolan Jiang
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Patent number: 8008128Abstract: Embodiments of the present invention include a method of packaging semiconductor devices. The method comprises the steps of molding a surface of a wafer, sawing the wafer into individual devices, attaching the individual semiconductor device to an adhesive surface, molding the exposed surface, and sawing the wafer into individual semiconductor devices. The step of molding forms a continuous molded layer. The step of sawing results in each individual semiconductor having a molded layer. This molded layer corresponds to a portion of the continuous molded layer. The step of attaching includes attaching the molded layer of the individual semiconductor devices to the adhesive surface. The step of molding the exposed area includes molding an exposed area above the adhesive surface. This forms a solid expanse of material. The step of sawing the wafer into individual semiconductor devices includes sawing the solid expanse of material.Type: GrantFiled: March 22, 2010Date of Patent: August 30, 2011Assignee: Shanghai Kaihong Technology Co., Ltd.Inventors: Xiaochun Tan, Zhining Li, Xaiolan Jiang
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Publication number: 20100178733Abstract: Embodiments of the present invention include a method of packaging semiconductor devices. The method comprises the steps of molding a surface of a wafer, sawing the wafer into individual devices, attaching the individual semiconductor device to an adhesive surface, molding the exposed surface, and sawing the wafer into individual semiconductor devices. The step of molding forms a continuous molded layer. The step of sawing results in each individual semiconductor having a molded layer. This molded layer corresponds to a portion of the continuous molded layer. The step of attaching includes attaching the molded layer of the individual semiconductor devices to the adhesive surface. The step of molding the exposed area includes molding an exposed area above the adhesive surface. This forms a solid expanse of material. The step of sawing the wafer into individual semiconductor devices includes sawing the solid expanse of material.Type: ApplicationFiled: March 22, 2010Publication date: July 15, 2010Applicant: SHANGHAI KAIHONG TECHNOLOGY CO., LTDInventors: Xiaochun Tan, Zhining Li, Xaiolan Jiang
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Patent number: 7713784Abstract: Embodiments of the present invention include a method of packaging semiconductor devices. The method comprises the steps of molding a surface of a wafer, sawing the wafer into individual devices, attaching the individual semiconductor device to an adhesive surface, molding the exposed surface, and sawing the wafer into individual semiconductor devices. The step of molding forms a continuous molded layer. The step of sawing results in each individual semiconductor having a molded layer. This molded layer corresponds to a portion of the continuous molded layer. The step of attaching includes attaching the molded layer of the individual semiconductor devices to the adhesive surface. The step of molding the exposed area includes molding an exposed area above the adhesive surface. This forms a solid expanse of material. The step of sawing the wafer into individual semiconductor devices includes sawing the solid expanse of material.Type: GrantFiled: April 25, 2008Date of Patent: May 11, 2010Assignee: Shanghai Kaihong Technology Co., Ltd.Inventors: Xiaochun Tan, Zhining Li, Xiaolan Jiang
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Publication number: 20090233401Abstract: Embodiments of the present invention include a method of packaging semiconductor devices. The method comprises the steps of molding a surface of a wafer, sawing the wafer into individual devices, attaching the individual semiconductor device to an adhesive surface, molding the exposed surface, and sawing the wafer into individual semiconductor devices. The step of molding forms a continuous molded layer. The step of sawing results in each individual semiconductor having a molded layer. This molded layer corresponds to a portion of the continuous molded layer. The step of attaching includes attaching the molded layer of the individual semiconductor devices to the adhesive surface. The step of molding the exposed area includes molding an exposed area above the adhesive surface. This forms a solid expanse of material. The step of sawing the wafer into individual semiconductor devices includes sawing the solid expanse of material.Type: ApplicationFiled: April 25, 2008Publication date: September 17, 2009Applicant: Shanghai KaiHong Technology Co., Ltd.Inventors: Xiaochun Tan, Zhining Li, Xiaolan Jiang