Abstract: In one aspect, the invention encompasses a semiconductor processing method wherein a conductive copper-containing material is formed over a semiconductive substrate and a second material is formed proximate the conductive material. A barrier layer is formed between the conductive material and the second material. The barrier layer comprises a compound having silicon chemically bonded to both nitrogen and an organic material. In another aspect, the invention encompasses a composition of matter comprising silicon chemically bonded to both nitrogen and an organic material. The nitrogen is not bonded to carbon. In yet another aspect, the invention encompasses a semiconductor processing method. A semiconductive substrate is provided and a layer is formed over the semiconductive substrate. The layer comprises a compound having silicon chemically bonded to both nitrogen and an organic material.

Abstract: The present invention relates to the formation of an ILD layer while preventing or reducing oxidation of the upper surface of a metallic interconnect. Avoidance of oxidation of the upper surface of a metallic interconnect is achieved according to the present invention by passivating the exposed upper surface of the metallic interconnect prior to formation of the ILD. In order to avoid the oxidation of an upper surface of an interconnect during the formation of an ILD layer, an in situ passivation of the upper surface of the interconnect, immediately prior to or simultaneously with the formation of the ILD layer avoids the problems of the prior art.

Abstract: A photo acid generator (PAG) or an acid is used to reduce resist scumming and footing. Diffusion of acid from photoresist into neighbors causes a decreased acid level, and thus causes resist scumming. An increased acid layer beneath the resist prevents acid diffusion. In one embodiment, the increased acid layer is a layer of spun-on acid or PAG dissolved in aqueous solution. In another embodiment, the increased acid layer is a hard mask material with a PAG or an acid mixed into the material. The high acid content inhibits the diffusion of acid from the photoresist into neighboring layers, and thus substantially reduces photoresist scumming and footing.

Abstract: Differently-sized features of an integrated circuit are formed by etching a substrate using a mask which is formed by combining two separately formed patterns. Pitch multiplication is used to form the relatively small features of the first pattern and conventional photolithography used to form the relatively large features of the second pattern. Pitch multiplication is accomplished by patterning a photoresist and then etching that pattern into an amorphous carbon layer. Sidewall spacers are then formed on the sidewalls of the amorphous carbon. The amorphous carbon is removed, leaving behind the sidewall spacers, which define the first mask pattern. A bottom anti-reflective coating (BARC) is then deposited around the spacers to form a planar surface and a photoresist layer is formed over the BARC. The photoresist is next patterned by conventional photolithography to form the second pattern, which is then is transferred to the BARC.

Abstract: The invention encompasses a method of forming a silicon nitride layer. A substrate is provided which comprises a first mass and a second mass. The first mass comprises silicon and the second mass comprises silicon oxide. A sacrificial layer is formed over the first mass. While the sacrificial layer is over the first mass, a nitrogen-containing material is formed across the second mass. After the nitrogen-containing material is formed, the sacrificial layer is removed. Subsequently, a silicon nitride layer is formed to extend across the first and second masses, with the silicon nitride layer being over the nitrogen-containing material. Also, a conductivity-enhancing dopant is provided within the first mass. The invention also pertains to methods of forming capacitor constructions.

Abstract: Differently-sized features of an integrated circuit are formed by etching a substrate using a mask which is formed by combining two separately formed patterns. Pitch multiplication is used to form the relatively small features of the first pattern and conventional photolithography used to form the relatively large features of the second pattern. Pitch multiplication is accomplished by patterning a photoresist and then etching that pattern into an amorphous carbon layer. Sidewall spacers are then formed on the sidewalls of the amorphous carbon. The amorphous carbon is removed, leaving behind the sidewall spacers, which define the first mask pattern. A bottom anti-reflective coating (BARC) is then deposited around the spacers to form a planar surface and a photoresist layer is formed over the BARC. The photoresist is next patterned by conventional photolithography to form the second pattern, which is then is transferred to the BARC.

Abstract: Differently-sized features of an integrated circuit are formed by etching a substrate using a mask which is formed by combining two separately formed patterns. Pitch multiplication is used to form the relatively small features of the first pattern and conventional photolithography used to form the relatively large features of the second pattern. Pitch multiplication is accomplished by patterning a photoresist and then etching that pattern into an amorphous carbon layer. Sidewall spacers are then formed on the sidewalls of the amorphous carbon. The amorphous carbon is removed, leaving behind the sidewall spacers, which define the first mask pattern. A bottom anti-reflective coating (BARC) is then deposited around the spacers to form a planar surface and a photoresist layer is formed over the BARC. The photoresist is next patterned by conventional photolithography to form the second pattern, which is then is transferred to the BARC.

Abstract: Differently-sized features of an integrated circuit are formed by etching a substrate using a mask which is formed by combining two separately formed patterns. Pitch multiplication is used to form the relatively small features of the first pattern and conventional photolithography used to form the relatively large features of the second pattern. Pitch multiplication is accomplished by patterning a photoresist and then etching that pattern into an amorphous carbon layer. Sidewall spacers are then formed on the sidewalls of the amorphous carbon. The amorphous carbon is removed, leaving behind the sidewall spacers, which define the first mask pattern. A bottom anti-reflective coating (BARC) is then deposited around the spacers to form a planar surface and a photoresist layer is formed over the BARC. The photoresist is next patterned by conventional photolithography to form the second pattern, which is then is transferred to the BARC.

Abstract: A transparent amorphous carbon layer is formed. The transparent amorphous carbon layer has a low absorption coefficient such that the amorphous carbon is transparent in visible light. The transparent amorphous carbon layer may be used in semiconductor devices for different purposes. The transparent amorphous carbon layer may be included in a final structure in semiconductor devices. The transparent amorphous carbon layer may also be used as a mask in an etching process during fabrication of semiconductor devices.

Abstract: A method of depositing a non-conductive barrier layer onto a metal surface wherein the resistance of the metal remains substantially unchanged before and after the non-conductive barrier layer deposition. The deposition process provides a low temperature processing environment so as to inhibit the formation of impurities such as silicide in the metal, wherein the silicide can adversely increase the resistance of the underlying metal.

Abstract: A photo acid generator (PAG) or an acid is used to reduce resist scumming and footing. Diffusion of acid from photoresist into neighbors causes a decreased acid level, and thus causes resist scumming. An increased acid layer beneath the resist prevents acid diffusion. In one embodiment, the increased acid layer is a layer of spun-on acid or PAG dissolved in aqueous solution. In another embodiment, the increased acid layer is a hard mask material with a PAG or an acid mixed into the material. The high acid content inhibits the diffusion of acid from the photoresist into neighboring layers, and thus substantially reduces photoresist scumming and footing.

Abstract: In one aspect, the invention includes a semiconductor processing method. An antireflective material layer is formed over a substrate. At least a portion of the antireflective material layer is annealed at a temperature of greater than about 400° C. A layer of photoresist is formed over the annealed antireflective material layer. The layer of photoresist is patterned. A portion of the antireflective material layer unmasked by the patterned layer of photoresist is removed. In another aspect, the invention includes the following semiconductor processing. An antireflective material layer is formed over a substrate. The antireflective material layer is annealed at a temperature of greater than about 400° C. A layer of photoresist is formed over the annealed antireflective material layer. Portions of the layer of photoresist are exposed to radiation waves. Some of the radiation waves are absorbed by the antireflective material during the exposing.

Abstract: In one embodiment, a method includes selectively depositing a collar material between a number of memory containers. The collar material along a side of a first memory container of the number of memory containers is in contact with the collar material along a side of a second memory container. An opening exists between the collar material along a corner of the first memory container and the collar material along a corner of a third memory container.

Abstract: The present invention relates to a laser fuse. The laser fuse comprises an element comprising a heat conductive material. The fuse also includes an absorption element comprising a material with an adjustable capacity for heat or light absorption that overlays the heat conductive element. The fuse also includes an outer insulating element that overlays and encloses the heat conductive element and the absorption element.

Abstract: The invention includes masking methods. In one implementation, a masking material which includes boron doped amorphous carbon is formed over a feature formed on a semiconductor substrate. The masking material includes at least about 0.5 atomic per cent boron. The masking material is substantially anisotropically etched effective to form an anisotropically etched sidewall spacer which includes the boron doped amorphous carbon on a sidewall of the feature. The substrate is then processed proximate the spacer while using the boron doped amorphous carbon-including spacer as a mask. After processing the substrate proximate the spacer, the boron doped amorphous carbon-including spacer is etched from the substrate. Other implementations and aspects are contemplated.

Abstract: The present invention relates to a laser fuse. The laser fuse comprises an element comprising a heat conductive material. The fuse also includes an absorption element comprising a material with an adjustable capacity for heat or light absorption that overlays the heat conductive element. The fuse also includes an outer insulating element that overlays and encloses the heat conductive element and the absorption element.

Abstract: A transparent amorphous carbon layer is formed. The transparent amorphous carbon layer has a low absorption coefficient such that the amorphous carbon is transparent in visible light. The transparent amorphous carbon layer may be used in semiconductor devices for different purposes. The transparent amorphous carbon layer may be included in a final structure in semiconductor devices. The transparent amorphous carbon layer may also be used as a mask in an etching process during fabrication of semiconductor devices.

Abstract: A transparent amorphous carbon layer is formed. The transparent amorphous carbon layer has a low absorption coefficient such that the amorphous carbon is transparent in visible light. The transparent amorphous carbon layer may be used in semiconductor devices for different purposes. The transparent amorphous carbon layer may be included in a final structure in semiconductor devices. The transparent amorphous carbon layer may also be used as a mask in an etching process during fabrication of semiconductor devices.

Abstract: A masking structure having multiple layers is formed. The masking structure includes an amorphous carbon layer and a cap layer formed over the amorphous carbon layer. The amorphous carbon layer includes transparent amorphous carbon. The cap layer includes non-oxide materials. The masking structure may be used as a mask in an etching process during fabrication of semiconductor devices.

Abstract: This invention includes chemical vapor deposition apparatus, methods of chemical vapor depositing an amorphous carbon comprising layer on a substrate, and methods of chemical vapor depositing at least one of Si3N4 and SixOyNz on a substrate. In certain implementations, a gas output manifold having at least one gas output to a deposition chamber and at least three gas inputs is utilized. In certain implementations, a remote plasma generator is utilized. In certain implementations, at least one cleaning gas input line feeds the remote plasma generator. In certain implementations, the at least one cleaning gas input line includes an amorphous carbon cleaning gas input and an Si3N4 or SixOyNz cleaning gas input.