Abstract: Provided is a liquid crystal handwriting board. The liquid crystal handwriting board includes: a liquid crystal panel, a photosensitive assembly, and a control assembly; wherein the liquid crystal panel includes a first substrate and a second substrate that are opposite; the photosensitive assembly includes a plurality of photosensitive elements; and the control assembly is electrically connected to the liquid crystal panel and the photosensitive assembly, and is configured to determine position information of a pixel region for erasure by detecting position information of target light irradiated to the liquid crystal panel by the photosensitive assembly and supply a pixel voltage to the plurality of pixel electrodes in the pixel region for erasure, such that a voltage difference is present between the plurality of pixel electrodes in the pixel region for erasure and the common electrode.

Abstract: A display panel includes a liquid crystal cell, a first polarizing assembly and a second polarizing assembly. The liquid crystal cell includes a first substrate and a second substrate disposed opposite to each other, and a liquid crystal layer disposed between the first substrate and the second substrate. The first polarizing assembly is disposed on a side of the first substrate further away from the liquid crystal layer and includes at least a first polarizing layer having a first transmission axis, and the first polarizing assembly is configured for generating polarized light whose polarization direction is parallel to the first transmission axis. The second polarizing assembly is located on a side of the second substrate further away from the liquid crystal layer and includes at least a transflective layer and a light absorbing layer.

Abstract: A liquid crystal handwriting board is provided. The liquid crystal handwriting board includes a first substrate and a second substrate that are disposed opposite to each other, and a liquid crystal layer disposed between the first substrate and the second substrate; wherein the first substrate includes: a first base substrate, and a transistor and a pixel electrode disposed at a side, proximal to the second substrate, of the first base substrate, the transistor being electrically connected to the pixel electrode; wherein the transistor includes a channel region, wherein a ratio of an area of the channel region to an on-current of the transistor is greater than a ratio of an area of a channel region of a reference transistor to an on-current of the reference transistor.

Abstract: A display module, including: a first substrate (1); a second substrate (2); a liquid crystal layer (3); the display module further includes a first polarizing film (4), a first one-half wave plate (51) and a first quarter wave plate (52); the first quarter wave plate (52), the first one-half wave plate (51) and the first polarizing film (4) are on a side of the first substrate (1) away from the liquid crystal layer (3) and are sequentially stacked in a direction away from the first substrate (1); an angle between an absorption axis of the first polarizing film (4) and a first direction is in a range of 85° to 105°; an angle between a slow axis of the first one-half wave plate (51) and the first direction is in a range of 105° to 125°.

Abstract: A display substrate and a display device relate to the technical field of displaying. The display substrate includes a plurality of display units spaced apart from each other and a plurality of connection units, the plurality of connection units being connected between two adjacent display units; the plurality of connection units include: two connection units arranged along a first direction, wherein the first direction is parallel to a stretching direction of the display substrate; wherein the two connection units arranged along the first direction are axisymmetric with respect to a first reference line, so that the plurality of connection units arranged along a second direction have a same deformation amount in a stretching state, the second direction is perpendicular to the stretching direction, and an extension direction of the first reference line is parallel to the second direction.

Abstract: A display substrate, a manufacturing method thereof and a display device. The display substrate includes a base substrate, a pixel driving circuit layer and an antenna layer, wherein the pixel driving circuit layer is arranged on the base substrate and includes a thin film transistor and a plurality of signal lines, and the antenna layer is arranged on a side of the pixel driving circuit layer far away from the pixel driving circuit layer and comprises a first antenna arranging region including a first antenna network formed by a plurality of first antenna lines; wherein in a direction perpendicular to the display substrate, at least a portion of the first antenna lines overlap with at least a portion of the signal lines.

Abstract: A display substrate, a manufacturing method thereof and a display device. The display substrate includes a base substrate, a pixel driving circuit layer and an antenna layer, wherein the pixel driving circuit layer is arranged on the base substrate and includes a thin film transistor and a plurality of signal lines, and the antenna layer is arranged on a side of the pixel driving circuit layer far away from the pixel driving circuit layer and includes a first antenna arranging region including a first antenna network formed by a plurality of first antenna lines.

Abstract: A resonator circuit device. The present invention provides for improved resonator shapes using egg-shaped, partial egg-shaped, and asymmetrical partial egg-shaped resonator structures. These resonator shapes are configured to give less spurious mode/noise below the resonant frequency (Fs) than rectangular, circular, and elliptical resonator shapes. These improved resonator shapes also provide filter layout flexibility, which allows for more compact resonator devices compared to resonator devices using conventionally shaped resonators.

Abstract: A BAW resonator ladder topology pass-band filter can include a plurality of series branches each including BAW series resonators. A plurality of shunt branches can each include BAW shunt resonators, wherein the plurality of series branches are coupled to the plurality of shunt branches to provide the BAW resonator ladder topology pass-band filter. A high-impedance shunt branch can include a plurality of high-impedance BAW shunt resonators coupled together in-series to provide an impedance for the high-impedance shunt branch that is greater the other shunt branches in the BAW resonator ladder topology pass-band filter.

Abstract: A BAW resonator ladder topology pass-band filter can include a plurality of series branches each including BAW series resonators. A plurality of shunt branches can each include BAW shunt resonators, wherein the plurality of series branches are coupled to the plurality of shunt branches to provide the BAW resonator ladder topology pass-band filter. A high-impedance shunt branch can include a plurality of high-impedance BAW shunt resonators coupled together in-series to provide an impedance for the high-impedance shunt branch that is greater the other shunt branches in the BAW resonator ladder topology pass-band filter.

Abstract: A device includes a piezoelectric layer on a substrate and including a portion included in an acoustic resonator, a first conductive layer on the piezoelectric layer and including a first electrode of the acoustic resonator on a first side of resonator portion of the piezoelectric layer, and a second conductive layer on the piezoelectric layer and including a second electrode of the acoustic resonator on a second side of the resonator portion of the piezoelectric layer. An insulating layer is disposed on the second conductive layer and an interconnection metal layer is electrically connected to the second conductive layer or the first conductive layer and has a portion extending onto the insulating layer and overlapping a portion of the second conductive layer to provide a capacitor electrode of a capacitor coupled to the first electrode and/or the second electrode.

Abstract: A resonator circuit device. This device can include a piezoelectric layer having a front-side electrode and a back-side electrode spatially configured on opposite sides of the piezoelectric layer. Each electrode has a connection region and a resonator region. Each electrode also includes a partial mass-loaded structure configured within a vicinity of its connection region. The front-side electrode and the back-side electrode are spatially configured in an anti-symmetrical manner with the resonator regions of both electrodes at least partially overlapping and the first and second connection regions on opposing sides. This configuration provides a symmetric acoustic impedance profile for improved Q factor and can reduce the issues of misalignment or unbalanced boundary conditions associated with conventional single mass-loaded perimeter configurations.

Abstract: A piezoelectric resonator device can be formed to include a piezoelectric film including an active area configured to provide a thickness excited mode of vibration, a first electrode on a first surface of the piezoelectric film positioned to electromechanically couple to the active area, a second electrode on a second surface of the piezoelectric film, opposite the first surface, the second electrode positioned to electromechanically couple to the active area, an energy confinement frame extending on the piezoelectric film embedded in the first or second electrode, an inner side wall of the energy confinement frame facing toward the active area and extending around the active area to define a perimeter that separates the active area located inside the perimeter from an outer area located outside the perimeter adjacent to the active area, an outer side wall of the energy confinement frame facing toward the outer area and aligned to an outer side wall of the first or second electrode and a conformal low-impedan

Abstract: A resonator circuit device. This device can include a piezoelectric layer having a front-side electrode and a back-side electrode spatially configured on opposite sides of the piezoelectric layer. Each electrode has a connection region and a resonator region. Each electrode also includes a partial mass-loaded structure configured within a vicinity of its connection region. The front-side electrode and the back-side electrode are spatially configured in an anti-symmetrical manner with the resonator regions of both electrodes at least partially overlapping and the first and second connection regions on opposing sides. This configuration provides a symmetric acoustic impedance profile for improved Q factor and can reduce the issues of misalignment or unbalanced boundary conditions associated with conventional single mass-loaded perimeter configurations.

Abstract: A resonator circuit device. The present invention provides for improved resonator shapes using egg-shaped, partial egg-shaped, and asymmetrical partial egg-shaped resonator structures. These resonator shapes are configured to give less spurious mode/noise below the resonant frequency (Fs) than rectangular, circular, and elliptical resonator shapes. These improved resonator shapes also provide filter layout flexibility, which allows for more compact resonator devices compared to resonator devices using conventionally shaped resonators.

Abstract: A resonator circuit device. The present invention provides for improved resonator shapes using egg-shaped, partial egg-shaped, and asymmetrical partial egg-shaped resonator structures. These resonator shapes are configured to give less spurious mode/noise below the resonant frequency (Fs) than rectangular, circular, and elliptical resonator shapes. These improved resonator shapes also provide filter layout flexibility, which allows for more compact resonator devices compared to resonator devices using conventionally shaped resonators.

Abstract: A device includes a piezoelectric layer on a substrate and including a portion included in an acoustic resonator, a first conductive layer on the piezoelectric layer and including a first electrode of the acoustic resonator on a first side of resonator portion of the piezoelectric layer, and a second conductive layer on the piezoelectric layer and including a second electrode of the acoustic resonator on a second side of the resonator portion of the piezoelectric layer. An insulating layer is disposed on the second conductive layer and an interconnection metal layer is electrically connected to the second conductive layer or the first conductive layer and has a portion extending onto the insulating layer and overlapping a portion of the second conductive layer to provide a capacitor electrode of a capacitor coupled to the first electrode and/or the second electrode.

Abstract: A piezoelectric resonator can include a substrate and a piezoelectric aluminum nitride layer on the substrate, where the piezoelectric aluminum nitride layer is doped with a dopant selected from the group consisting of Si, Mg, Ge, C, Sc and/or Fe at a respective level sufficient to induce a stress in the piezoelectric aluminum nitride layer in a range between about 150 MPa compressive stress and about 300 MPa tensile stress.

Abstract: A BAW resonator ladder topology pass-band filter can include a plurality of series branches each including BAW series resonators. A plurality of shunt branches can each include BAW shunt resonators, wherein the plurality of series branches are coupled to the plurality of shunt branches to provide the BAW resonator ladder topology pass-band filter. A high-impedance shunt branch can include a plurality of high-impedance BAW shunt resonators coupled together in-series to provide an impedance for the high-impedance shunt branch that is greater the other shunt branches in the BAW resonator ladder topology pass-band filter.

Abstract: A resonator circuit device. This device can include a piezoelectric layer having a front-side electrode and a back-side electrode spatially configured on opposite sides of the piezoelectric layer. Each electrode has a connection region and a resonator region. Each electrode also includes a partial mass-loaded structure configured within a vicinity of its connection region. The front-side electrode and the back-side electrode are spatially configured in an anti-symmetrical manner with the resonator regions of both electrodes at least partially overlapping and the first and second connection regions on opposing sides. This configuration provides a symmetric acoustic impedance profile for improved Q factor and can reduce the issues of misalignment or unbalanced boundary conditions associated with conventional single mass-loaded perimeter configurations.