Abstract: An apparatus for testing electronic components includes a base, a screw rod structure, a first sliding portion, a second sliding portion, a vacuum-based or similar adsorption structure, and a probe. The screw rod structure is fixedly connected to one side of the base. The first sliding portion is slidably positioned on the screw rod structure. The second sliding portion is slidably positioned on the first sliding portion. The adsorption structure is arranged on the second sliding portion. The adsorption structure gathers and holds an electronic component. The probe and the electronic component are arranged to correspond. The probe is electrically connected to a test device. The test device tests the electronic component through the probe.

Abstract: An apparatus for testing electronic components includes a base, a screw rod structure, a first sliding portion, a second sliding portion, a vacuum-based or similar adsorption structure, and a probe. The screw rod structure is fixedly connected to one side of the base. The first sliding portion is slidably positioned on the screw rod structure. The second sliding portion is slidably positioned on the first sliding portion. The adsorption structure is arranged on the second sliding portion. The adsorption structure gathers and holds an electronic component. The probe and the electronic component are arranged to correspond. The probe is electrically connected to a test device. The test device tests the electronic component through the probe.

Abstract: A bus switch has reduced input capacitance. Parasitic source-to-well and drain-to-well capacitors are shorted by well-shorting transistors, eliminating these parasitic capacitances. The well-shorting transistors are turned on when the bus-switch transistor is turned on, but are turned off when the bus-switch transistor is turned off and the bus switch isolates signals on its source and drain. The isolated P-well under the bus-switch transistor and the well-shorting transistors is not tied to ground. Instead the isolated P-well is floating when the bus-switch transistor is turned on. When the bus-switch transistor is turned off, the underlying isolated P-well is driven to ground by a biasing transistor in another P-well. Since the isolated P-well has a much lower doping than the N+ source and drain, the capacitance of the well-to-substrate junction is much less than the source-to-well capacitance. Thus input capacitance is reduced, allowing higher frequency switching.

Abstract: ESD protection is provided by local ESD-protection devices between each pad and a common-discharge line (CDL). Each ESD-protection device has p-well or p-substrate taps to a local ground rather than to the CDL, reducing noise coupling from the I/O's through the CDL. Another ESD clamp that bypasses the CDL is provided between each pair of internal power and ground buses. Better protection of core circuits during power-to-ground ESD events is provided by bypassing the CDL since only one ESD clamp rather than two ESD-protection devices must turn on. The ESD clamps and ESD-protection devices can be gate-coupled n-channel transistors with coupling capacitors between the pad and the transistor gate. Devices can also be substrate-triggered transistors or active ESD clamps that include an inverter between a coupling capacitor to the CDL and the n-channel transistor gate.