Patents by Inventor Zhisheng Shi
Zhisheng Shi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220277902Abstract: A solar cell having a transparent conducting layer disposed upon a substrate, an electron transporting layer (ETL) disposed upon the transparent conducting layer, a perovskite layer disposed upon the ETL layer, an inorganic dichalcogenide material disposed upon the perovskite layer, and a conducting material disposed upon the dichalcogenide material, the dichalcogenide material and the conducting material together comprising a dichalcogenide composite electrode. In another embodiment, the solar cell has a first conducting material disposed upon a substrate, an inorganic dichalcogenide material disposed upon the first conducting material forming a dichalcogenide composite electrode, a perovskite layer disposed upon the dichalcogenide composite electrode, an ETL disposed upon the perovskite layer, and a second conducting material disposed upon the ETL.Type: ApplicationFiled: July 29, 2020Publication date: September 1, 2022Inventors: Zhisheng Shi, Jijun Qiu
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Patent number: 11271131Abstract: A semiconductor PV detector comprises a Ge layer and a Pb-chalcogenide layer coupled to the Ge layer. The Ge layer comprises a first conduction band with a first conduction potential and a first valence band with a first valence potential. The Pb-chalcogenide layer comprises a second conduction band with a second conduction potential that is lower than the first conduction potential and a second valence band with a second valence potential that is lower than the first valence potential. The Ge layer and the Pb-chalcogenide layer form a heterojunction configured to allow electrons to flow from the Ge layer to the Pb-chalcogenide layer and allow holes to flow from the Pb-chalcogenide layer to the Ge layer.Type: GrantFiled: August 13, 2020Date of Patent: March 8, 2022Assignee: The Board of Regents of the University of OklahomaInventors: Zhisheng Shi, Jijun Qiu, Lance McDowell
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Publication number: 20210050468Abstract: A semiconductor PV detector comprises a Ge layer and a Pb-chalcogenide layer coupled to the Ge layer. The Ge layer comprises a first conduction band with a first conduction potential and a first valence band with a first valence potential. The Pb-chalcogenide layer comprises a second conduction band with a second conduction potential that is lower than the first conduction potential and a second valence band with a second valence potential that is lower than the first valence potential. The Ge layer and the Pb-chalcogenide layer form a heterojunction configured to allow electrons to flow from the Ge layer to the Pb-chalcogenide layer and allow holes to flow from the Pb-chalcogenide layer to the Ge layer.Type: ApplicationFiled: August 13, 2020Publication date: February 18, 2021Inventors: Zhisheng Shi, Jijun Qiu, Lance McDowell
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Patent number: 10109754Abstract: Disclosed is at least one embodiment of an infrared (IR) photovoltaic (PV) detector, comprising a IV-VI Lead (Pb)-salt layer disposed on a substrate and a charge-separation-junction (CSJ) structure associated with the IV-VI Pb-salt layer, wherein the CSJ structure comprises a plurality of element areas disposed upon or within the IV-VI Pb-salt layer, wherein the plurality of element areas are spaced apart from each other. Each element area may be connected to a first Ohmic contact thereby forming a plurality of interconnected first Ohmic contacts, and a second Ohmic contact may be disposed upon a portion of the IV-VI Pb-salt layer. In another non-limiting embodiment, a PV detector, comprising a heterojunction region that comprises at least one IV-VI Pb-salt material layer coupled to at least one non-Pb-salt layer, wherein the at least one IV-VI Pb-salt layer and the at least one non-Pb-salt layer form a p-n junction or Schottky junction with a type II band gap alignment.Type: GrantFiled: December 18, 2015Date of Patent: October 23, 2018Assignee: The Board of Regents of the University of OklahomaInventor: Zhisheng Shi
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Publication number: 20180254363Abstract: A structure having a bulk crystalline matrix material and a plurality of nanoscale crystallites embedded within the bulk crystalline matrix material. The bulk crystalline matrix material and the nanoscale crystallites comprise a semiconductor material having the same chemical composition. The nanoscale crystallites are spatially distributed throughout substantially the entire bulk crystalline matrix material.Type: ApplicationFiled: August 31, 2016Publication date: September 6, 2018Inventor: Zhisheng Shi
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Patent number: 9887309Abstract: Disclosed is at least one embodiment of an infrared (IR) photovoltaic (PV) detector, comprising a IV-VI Lead (Pb)-salt layer disposed on a substrate and a charge-separation-junction (CSJ) structure associated with the IV-VI Pb-salt layer, wherein the CSJ structure comprises a plurality of element areas disposed upon or within the IV-VI Pb-salt layer, wherein the plurality of element areas are spaced apart from each other. Each element area may be connected to a first Ohmic contact thereby forming a plurality of interconnected first Ohmic contacts, and a second Ohmic contact may be disposed upon a portion of the IV-VI Pb-salt layer. In another non-limiting embodiment, a PV detector, comprising a heterojunction region that comprises at least one IV-VI Pb-salt material layer coupled to at least one non-Pb-salt layer, wherein the at least one IV-VI Pb-salt layer and the at least one non-Pb-salt layer form a p-n junction or Schottky junction with a type II band gap alignment.Type: GrantFiled: December 18, 2015Date of Patent: February 6, 2018Assignee: The Board of Regents of the University of OkalahomaInventors: Zhisheng Shi, Jijun Qiu, Binbin Weng
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Publication number: 20160111567Abstract: Disclosed is at least one embodiment of an infrared (IR) photovoltaic (PV) detector, comprising a IV-VI Lead (Pb)-salt layer disposed on a substrate and a charge-separation-junction (CSJ) structure associated with the IV-VI Pb-salt layer, wherein the CSJ structure comprises a plurality of element areas disposed upon or within the IV-VI Pb-salt layer, wherein the plurality of element areas are spaced apart from each other. Each element area may be connected to a first Ohmic contact thereby forming a plurality of interconnected first Ohmic contacts, and a second Ohmic contact may be disposed upon a portion of the IV-VI Pb-salt layer. In another non-limiting embodiment, a PV detector, comprising a heterojunction region that comprises at least one IV-VI Pb-salt material layer coupled to at least one non-Pb-salt layer, wherein the at least one IV-VI Pb-salt layer and the at least one non-Pb-salt layer form a p-n junction or Schottky junction with a type II band gap alignment.Type: ApplicationFiled: December 18, 2015Publication date: April 21, 2016Inventors: Zhisheng Shi, Jijun Qiu, Binbin Weng
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Publication number: 20160111579Abstract: Disclosed is at least one embodiment of an infrared (IR) photovoltaic (PV) detector, comprising a IV-VI Lead (Pb)-salt layer disposed on a substrate and a charge-separation-junction (CSJ) structure associated with the IV-VI Pb-salt layer, wherein the CSJ structure comprises a plurality of element areas disposed upon or within the IV-VI Pb-salt layer, wherein the plurality of element areas are spaced apart from each other. Each element area may be connected to a first Ohmic contact thereby forming a plurality of interconnected first Ohmic contacts, and a second Ohmic contact may be disposed upon a portion of the IV-VI Pb-salt layer. In another non-limiting embodiment, a PV detector, comprising a heterojunction region that comprises at least one IV-VI Pb-salt material layer coupled to at least one non-Pb-salt layer, wherein the at least one IV-VI Pb-salt layer and the at least one non-Pb-salt layer form a p-n junction or Schottky junction with a type II band gap alignment.Type: ApplicationFiled: December 18, 2015Publication date: April 21, 2016Inventors: Zhisheng Shi, Jijun Qiu, Binbin Weng
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Publication number: 20150325723Abstract: Method and apparatus for semiconductor devices are presented. The method may be performed by applying a layer of polycrystalline material to a surface of a substrate. The polycrystalline layer may be a lead salt semiconductor material. The method is further performed by applying junctions and two or more spaced apart electrical contacts to the polycrystalline material to create a photovoltaic device in which changes in light interacting with the polycrystalline material causes changes in voltage at the junctions thereby enabling photodetection.Type: ApplicationFiled: December 13, 2013Publication date: November 12, 2015Inventor: Zhisheng Shi
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Publication number: 20140252529Abstract: The disclosure describes methods for preparing lead salt materials which are sensitive to the mid-infrared spectrum which can be used to manufacture high-uniformity, high-detectivity, polycrystalline lead salt photoconductive and photovoltaic photodetectors.Type: ApplicationFiled: February 28, 2014Publication date: September 11, 2014Inventors: Zhisheng Shi, Jijun Qiu, Binbin Weng, Zijian Yuan
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Publication number: 20140154874Abstract: A crystalline structure comprising a substrate, which has a surface. The surface has one or more wells formed therein defining one or more growing area and at least one layer of dissimilar crystalline material epitaxially grown on the growing area. A method of making a crystalline structure having a low threading dislocation density comprising the steps of (a) patterning a surface of a substrate material such that one or more wells defining a growing area is formed therein; and (b) epitaxially growing at least one strained layer of dissimilar crystalline material on the growing area of the surface of the substrate material, such that the threading dislocation density of the at least one strained layer is reduced by the one or more wells.Type: ApplicationFiled: February 6, 2014Publication date: June 5, 2014Applicant: THE BOARD OF REGENTS OF THE UNIVERSITY OF OKLAHOMAInventor: Zhisheng Shi
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Publication number: 20120326210Abstract: A crystalline structure comprising a substrate, which has a surface. The surface has one or more wells formed therein defining one or more growing area and at least one layer of dissimilar crystalline material epitaxially grown on the growing area. A method of making a crystalline structure having a low threading dislocation density comprising the steps of (a) patterning a surface of a substrate material such that one or more wells defining a growing area is formed therein; and (b) epitaxially growing at least one strained layer of dissimilar crystalline material on the growing area of the surface of the substrate material, such that the threading dislocation density of the at least one strained layer is reduced by the one or more wells.Type: ApplicationFiled: June 24, 2011Publication date: December 27, 2012Inventor: Zhisheng Shi
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Patent number: 7400663Abstract: A method of growing and fabricating a group IV-VI semiconductor structure, for use in fabricating devices. In one embodiment, the group IV-VI semiconductor structure produced by the method of the present invention includes a group IV-VI material grown on a selected orientation of [110]. The devices fabricated can be a laser, detector, solar cell, thermal electrical cooling devices, etc. A laser device produced according to the present method will have a low threshold due to the lift-off of the energy degeneracy and low defect density. Growth on the [110] orientation also allows epitaxial growth of the semiconductor structure on a dissimilar substrate, which could improve the thermal dissipation and thus increase the operating temperature of the laser device.Type: GrantFiled: February 4, 2005Date of Patent: July 15, 2008Assignee: The Board of Regents of the University of OklahomaInventor: Zhisheng Shi
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Publication number: 20050199869Abstract: A method of growing and fabricating a group IV-VI semiconductor structure, for use in fabricating devices. In one embodiment, the group IV-VI semiconductor structure produced by the method of the present invention includes a group IV-VI material grown on a selected orientation of [110]. The devices fabricated can be a laser, detector, solar cell, thermal electrical cooling devices, etc. A laser device produced according to the present method will have a low threshold due to the lift-off of the energy degeneracy and low defect density. Growth on the [110] orientation also allows epitaxial growth of the semiconductor structure on a dissimilar substrate, which could improve the thermal dissipation and thus increase the operating temperature of the laser device.Type: ApplicationFiled: February 4, 2005Publication date: September 15, 2005Inventor: Zhisheng Shi