Patents by Inventor Zhiwei Dong
Zhiwei Dong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250012999Abstract: An assembly is used to mount an optical system on a body element of a vehicle. The optical system comprises an image-capturing device and a device for projecting a fluid for cleaning the image-capturing device. The arrangement comprises a housing element for retaining the optical device in a mounting position, the housing element having an electrical interface configured to couple to an electrical connector of the image-capturing device when the latter is disposed in the mounting position, an element for holding the fluid projection device, and an element for fastening the housing element and the holding element to the body element of the vehicle.Type: ApplicationFiled: September 18, 2024Publication date: January 9, 2025Inventors: Anthony Sanchez, Marcel Lindgens, Zhiwei Dong
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Patent number: 12028028Abstract: A digital isolator device which includes a first input buffer configured to receive a first differential signal from a transmitter and to provide a second differential signal, the first differential signal being characterized by a first magnitude, the second differential signal being characterized by a second magnitude, the first magnitude being greater than the second magnitude. The device also includes a second input buffer configured to receive a third differential signal from the transmitter and to provide a fourth differential signal, the second input buffer being coupled to the second ground terminal. The device also includes a common-mode circuit coupled to the second differential signal and the fourth differential signal, the common-mode circuit being configured to reduce a common-mode transient voltage, the common-mode transient voltage being associated with a voltage differential between the first ground terminal and the second ground terminal.Type: GrantFiled: July 30, 2021Date of Patent: July 2, 2024Assignee: 2PAI SEMICONDUCTOR CO., LIMITEDInventor: Zhiwei Dong
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Publication number: 20240213142Abstract: A capacitive isolator is developed. Embodiments of the capacitive isolator include a substrate; a shallow trench isolation region coupled to the substrate; a polysilicon layer disposed above the shallow trench isolation region; a bottom metal plate disposed above the polysilicon layer; one or more lower dielectric layers above the bottom metal plate; an intermediate metal plate disposed above the one or more lower dielectric layers; and a top metal plate disposed above the intermediate metal plate. A semiconductor device including two capacitive isolators and an isolation structure disposed between the two capacitive isolators is also developed.Type: ApplicationFiled: February 10, 2023Publication date: June 27, 2024Applicant: 2Pai Semiconductor (Shanghai) Co. LtdInventor: Zhiwei DONG
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Patent number: 11431302Abstract: An isolation circuit and a method for providing isolation between two dies are provided. The isolation circuit includes: an isolation module, configured to generate an isolation signal based on an input signal from a first die and to provide isolation between the first die and a second die, where the isolation signal is smaller than the input signal in amplitude, and the first die is coupled with the second die; a latch module, configured to latch the isolation signal at a certain level and output a latched signal; an amplifier module, configured to amplify the latched signal. In the isolation circuit, a modulation module and a demodulation module can be saved.Type: GrantFiled: September 18, 2020Date of Patent: August 30, 2022Assignee: 2PAI SEMICONDUCTOR CO., LTD.Inventor: Zhiwei Dong
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Publication number: 20220219619Abstract: An assembly is used to mount an optical system on a body element of a vehicle. The optical system comprises an image-capturing device and a device for projecting a fluid for cleaning the image-capturing device. The arrangement comprises a housing element for retaining the optical device in a mounting position, the housing element having an electrical interface configured to couple to an electrical connector of the image-capturing device when the latter is disposed in the mounting position, an element for holding the fluid projection device, and an element for fastening the housing element and the holding element to the body element of the vehicle.Type: ApplicationFiled: March 31, 2020Publication date: July 14, 2022Inventors: Anthony Sanchez, Marcel Lindgens, Zhiwei Dong
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Publication number: 20220224315Abstract: A latch circuit includes a first differential input terminal for receiving a first differential input signal and a second differential input terminal for receiving a second differential input signal. The circuit also includes a first switch comprising a first switch input terminal coupled to the first differential input terminal and a first output terminal, and a second switch comprising a second switch input terminal coupled to the second differential input terminal and a second output terminal. The circuit also includes a first cascade switch coupled to the first output terminal and a second cascade switch coupled to the second output terminal. The first differential input signal is characterized by a swing voltage of less than 300 mV and includes a first pulse component and a first non-zero voltage component, the first non-zero voltage component being attributed at least to the first switch and the first input resistor.Type: ApplicationFiled: April 1, 2022Publication date: July 14, 2022Applicant: 2Pai Semiconductor Co., LimitedInventor: Zhiwei Dong
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Publication number: 20210359650Abstract: A digital isolator device which includes a first input buffer configured to receive a first differential signal from a transmitter and to provide a second differential signal, the first differential signal being characterized by a first magnitude, the second differential signal being characterized by a second magnitude, the first magnitude being greater than the second magnitude. The device also includes a second input buffer configured to receive a third differential signal from the transmitter and to provide a fourth differential signal, the second input buffer being coupled to the second ground terminal. The device also includes a common-mode circuit coupled to the second differential signal and the fourth differential signal, the common-mode circuit being configured to reduce a common-mode transient voltage, the common-mode transient voltage being associated with a voltage differential between the first ground terminal and the second ground terminal.Type: ApplicationFiled: July 30, 2021Publication date: November 18, 2021Applicant: 2Pai Semiconductor Co., LimitedInventor: Zhiwei DONG
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Publication number: 20210021241Abstract: An isolation circuit and a method for providing isolation between two dies are provided. The isolation circuit includes: an isolation module, configured to generate an isolation signal based on an input signal from a first die and to provide isolation between the first die and a second die, where the isolation signal is smaller than the input signal in amplitude, and the first die is coupled with the second die; a latch module, configured to latch the isolation signal at a certain level and output a latched signal; an amplifier module, configured to amplify the latched signal. In the isolation circuit, a modulation module and a demodulation module can be saved.Type: ApplicationFiled: September 18, 2020Publication date: January 21, 2021Applicant: 2Pai Semiconductor Co., LimitedInventor: Zhiwei DONG
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Patent number: 10812027Abstract: An isolation circuit and a method for providing isolation between two dies are provided. The isolation circuit includes: an isolation module, configured to generate an isolation signal based on an input signal from a first die and to provide isolation between the first die and a second die, where the isolation signal is smaller than the input signal in amplitude, and the first die is coupled with the second die; a latch module, configured to latch the isolation signal at a certain level and output a latched signal; an amplifier module, configured to amplify the latched signal. In the isolation circuit, a modulation module and a demodulation module can be saved.Type: GrantFiled: May 25, 2018Date of Patent: October 20, 2020Assignee: 2PAI SEMICONDUCTOR CO., LIMITEDInventor: Zhiwei Dong
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Publication number: 20190214974Abstract: A latch and an isolation circuit are provided. The latch includes a first-level substructure and at least one second-level substructure, the number of the at least one second-level substructure is k, and k is a positive integer greater than or equal to 1. The first-level substructure includes a first load having a first terminal coupled with a first port, a second load having a first terminal coupled with the first port, a first driving circuit having a control terminal coupled with a second terminal of the first load and a second terminal coupled with a second port, a second driving circuit having a control terminal coupled with a second terminal of the second load and a second terminal coupled with the second port. Each of the at least one second-level substructure includes a third load, a fourth load, a third driving circuit and a fourth driving circuit.Type: ApplicationFiled: June 7, 2018Publication date: July 11, 2019Applicant: 2PAI SEMICONDUCTOR CO., LIMITEDInventor: Zhiwei DONG
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Publication number: 20180342989Abstract: An isolation circuit and a method for providing isolation between two dies are provided. The isolation circuit includes: an isolation module, configured to generate an isolation signal based on an input signal from a first die and to provide isolation between the first die and a second die, where the isolation signal is smaller than the input signal in amplitude, and the first die is coupled with the second die; a latch module, configured to latch the isolation signal at a certain level and output a latched signal; an amplifier module, configured to amplify the latched signal. In the isolation circuit, a modulation module and a demodulation module can be saved.Type: ApplicationFiled: May 25, 2018Publication date: November 29, 2018Applicant: 2PAI SEMICONDUCTOR CO., LIMITEDInventor: Zhiwei DONG
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Patent number: 8861229Abstract: An apparatus includes a regulator circuit that generates a voltage in response to an input current being supplied to an input terminal and functional circuitry, powered by the voltage generated by the regulator circuit. The functional circuitry, e.g., an oscillator, generates a signal using the generated voltage, the signal indicative that the current is being supplied to the apparatus. The signal can be provided over an isolation link to provide a control signal for controlling a high voltage driver circuit.Type: GrantFiled: May 29, 2008Date of Patent: October 14, 2014Assignee: Silicon Laboratories Inc.Inventors: Donald E. Alfano, Timothy J. Dupuis, Zhiwei Dong, Brett E. Etter
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Patent number: 8643138Abstract: A high breakdown voltage integrated circuit isolator device communicates a digital signal from a signal input on one semiconductor die to a signal output on another semiconductor die while providing high voltage isolation between the signal input and the signal output. Each die may include a respective capacitive isolation barrier structure that couple together via a bonding wire between combined top metal/bonding pads of the capacitive isolation barrier structures.Type: GrantFiled: June 30, 2011Date of Patent: February 4, 2014Assignee: Silicon Laboratories Inc.Inventor: Zhiwei Dong
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Patent number: 8644365Abstract: In one embodiment, a method includes receiving an input signal in transmitter circuitry of a first semiconductor die and processing the input signal, sending the processed input signal to an isolation circuit of the die to generate a voltage isolated signal, and outputting the voltage isolated signal from the isolation circuit to a second semiconductor die coupled to the first semiconductor die via a bonding mechanism. Note that this second semiconductor die may not include isolation circuitry.Type: GrantFiled: March 30, 2012Date of Patent: February 4, 2014Assignee: Silicon Laboratories Inc.Inventor: Zhiwei Dong
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Publication number: 20130257527Abstract: In one embodiment, a method includes receiving an input signal in transmitter circuitry of a first semiconductor die and processing the input signal, sending the processed input signal to an isolation circuit of the die to generate a voltage isolated signal, and outputting the voltage isolated signal from the isolation circuit to a second semiconductor die coupled to the first semiconductor die via a bonding mechanism. Note that this second semiconductor die may not include isolation circuitry.Type: ApplicationFiled: March 30, 2012Publication date: October 3, 2013Inventor: Zhiwei Dong
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Patent number: 8502584Abstract: One aspect of the present invention is directed to a circuit that includes an amplifier circuit disposed between an isolation link and a Schmitt trigger circuit to amplify a differential signal communicated over the isolation link and supply the amplified signal to the Schmitt trigger circuit. In turn, the Schmitt trigger circuit is coupled to the amplifier circuit to receive the differential signal and to supply a differential output signal corresponding to the differential signal communicated over the isolation link.Type: GrantFiled: March 30, 2012Date of Patent: August 6, 2013Assignee: Silicon Laboratories IncInventors: Zhiwei Dong, Jing Li, Michael L. Duffy, Michael Mills
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Patent number: 8451032Abstract: High voltage isolation capabilities are provided using a first integrated circuit die that includes an inverting circuit path and a non-inverting circuit path coupled to receive a single-ended signal and to generate a differential signal from the single-ended signal for transmission over an isolation link. A second integrated circuit die includes a differential Schmitt trigger circuit coupled to the differential signal communicated over the isolation link and to supply at least one output signal corresponding thereto. An isolation barrier is disposed between the inverting and non-inverting circuit paths and the differential Schmitt trigger circuit and includes at least two isolation capacitors coupled to respectively transmit each portion of the differential signal.Type: GrantFiled: December 22, 2010Date of Patent: May 28, 2013Assignee: Silicon Laboratories Inc.Inventors: Zhiwei Dong, Ka Y. Leung
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Patent number: 8441325Abstract: An isolator that includes first and second substantially identical circuitry galvanically isolated from each other and each having at least one communications channel thereon for communicating signals across an isolation boundary therebetween and each of said first and second circuitry having configurable functionality associated with the operation thereof. A coupling device is provided for coupling signal across the isolation boundary between the at least one communication channels of the first and second circuitry. First and second configuration memories are provided, each associated with a respective one of the first and second circuitry. First and second configuration control devices are provided, each associated with a respective one of the first and second circuitry and each configuring the functionality of the associated one of the first and second circuitry.Type: GrantFiled: June 30, 2009Date of Patent: May 14, 2013Assignee: Silicon Laboratories Inc.Inventors: Phil A. Callahan, Ahsan Javed, Zhiwei Dong, Axel Thomsen, Donald E. Alfano, Timothy Dupuis, Ka Y. Leung
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Publication number: 20130001738Abstract: A high breakdown voltage integrated circuit isolator device communicates a digital signal from a signal input on one semiconductor die to a signal output on another semiconductor die while providing high voltage isolation between the signal input and the signal output. Each die may include a respective capacitive isolation barrier structure that couple together via a bonding wire between combined top metal/bonding pads of the capacitive isolation barrier structures.Type: ApplicationFiled: June 30, 2011Publication date: January 3, 2013Applicant: SILICON LABORATORIES, INC.Inventor: Zhiwei Dong
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Publication number: 20120241905Abstract: An integrated circuit includes a conductive substrate pick-up region in the substrate that forms a perimeter around a portion of the substrate. Conductive stripes traverse the portion of the substrate within the perimeter and are coupled to a low impedance node along with the substrate pick-up region. A capacitor has a bottom plate formed above the conductive stripes. The pick-up region and the conductive stripes absorb injected current caused by parasitic capacitance between the bottom plate of the capacitor and the substrate region thereby reducing cross-talk caused by the injected current.Type: ApplicationFiled: March 25, 2011Publication date: September 27, 2012Inventors: William W.K. Tang, Shouli Yan, Zhiwei Dong