Patents by Inventor Zhiwei Dong

Zhiwei Dong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250012999
    Abstract: An assembly is used to mount an optical system on a body element of a vehicle. The optical system comprises an image-capturing device and a device for projecting a fluid for cleaning the image-capturing device. The arrangement comprises a housing element for retaining the optical device in a mounting position, the housing element having an electrical interface configured to couple to an electrical connector of the image-capturing device when the latter is disposed in the mounting position, an element for holding the fluid projection device, and an element for fastening the housing element and the holding element to the body element of the vehicle.
    Type: Application
    Filed: September 18, 2024
    Publication date: January 9, 2025
    Inventors: Anthony Sanchez, Marcel Lindgens, Zhiwei Dong
  • Patent number: 12028028
    Abstract: A digital isolator device which includes a first input buffer configured to receive a first differential signal from a transmitter and to provide a second differential signal, the first differential signal being characterized by a first magnitude, the second differential signal being characterized by a second magnitude, the first magnitude being greater than the second magnitude. The device also includes a second input buffer configured to receive a third differential signal from the transmitter and to provide a fourth differential signal, the second input buffer being coupled to the second ground terminal. The device also includes a common-mode circuit coupled to the second differential signal and the fourth differential signal, the common-mode circuit being configured to reduce a common-mode transient voltage, the common-mode transient voltage being associated with a voltage differential between the first ground terminal and the second ground terminal.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: July 2, 2024
    Assignee: 2PAI SEMICONDUCTOR CO., LIMITED
    Inventor: Zhiwei Dong
  • Publication number: 20240213142
    Abstract: A capacitive isolator is developed. Embodiments of the capacitive isolator include a substrate; a shallow trench isolation region coupled to the substrate; a polysilicon layer disposed above the shallow trench isolation region; a bottom metal plate disposed above the polysilicon layer; one or more lower dielectric layers above the bottom metal plate; an intermediate metal plate disposed above the one or more lower dielectric layers; and a top metal plate disposed above the intermediate metal plate. A semiconductor device including two capacitive isolators and an isolation structure disposed between the two capacitive isolators is also developed.
    Type: Application
    Filed: February 10, 2023
    Publication date: June 27, 2024
    Applicant: 2Pai Semiconductor (Shanghai) Co. Ltd
    Inventor: Zhiwei DONG
  • Patent number: 11431302
    Abstract: An isolation circuit and a method for providing isolation between two dies are provided. The isolation circuit includes: an isolation module, configured to generate an isolation signal based on an input signal from a first die and to provide isolation between the first die and a second die, where the isolation signal is smaller than the input signal in amplitude, and the first die is coupled with the second die; a latch module, configured to latch the isolation signal at a certain level and output a latched signal; an amplifier module, configured to amplify the latched signal. In the isolation circuit, a modulation module and a demodulation module can be saved.
    Type: Grant
    Filed: September 18, 2020
    Date of Patent: August 30, 2022
    Assignee: 2PAI SEMICONDUCTOR CO., LTD.
    Inventor: Zhiwei Dong
  • Publication number: 20220219619
    Abstract: An assembly is used to mount an optical system on a body element of a vehicle. The optical system comprises an image-capturing device and a device for projecting a fluid for cleaning the image-capturing device. The arrangement comprises a housing element for retaining the optical device in a mounting position, the housing element having an electrical interface configured to couple to an electrical connector of the image-capturing device when the latter is disposed in the mounting position, an element for holding the fluid projection device, and an element for fastening the housing element and the holding element to the body element of the vehicle.
    Type: Application
    Filed: March 31, 2020
    Publication date: July 14, 2022
    Inventors: Anthony Sanchez, Marcel Lindgens, Zhiwei Dong
  • Publication number: 20220224315
    Abstract: A latch circuit includes a first differential input terminal for receiving a first differential input signal and a second differential input terminal for receiving a second differential input signal. The circuit also includes a first switch comprising a first switch input terminal coupled to the first differential input terminal and a first output terminal, and a second switch comprising a second switch input terminal coupled to the second differential input terminal and a second output terminal. The circuit also includes a first cascade switch coupled to the first output terminal and a second cascade switch coupled to the second output terminal. The first differential input signal is characterized by a swing voltage of less than 300 mV and includes a first pulse component and a first non-zero voltage component, the first non-zero voltage component being attributed at least to the first switch and the first input resistor.
    Type: Application
    Filed: April 1, 2022
    Publication date: July 14, 2022
    Applicant: 2Pai Semiconductor Co., Limited
    Inventor: Zhiwei Dong
  • Publication number: 20210359650
    Abstract: A digital isolator device which includes a first input buffer configured to receive a first differential signal from a transmitter and to provide a second differential signal, the first differential signal being characterized by a first magnitude, the second differential signal being characterized by a second magnitude, the first magnitude being greater than the second magnitude. The device also includes a second input buffer configured to receive a third differential signal from the transmitter and to provide a fourth differential signal, the second input buffer being coupled to the second ground terminal. The device also includes a common-mode circuit coupled to the second differential signal and the fourth differential signal, the common-mode circuit being configured to reduce a common-mode transient voltage, the common-mode transient voltage being associated with a voltage differential between the first ground terminal and the second ground terminal.
    Type: Application
    Filed: July 30, 2021
    Publication date: November 18, 2021
    Applicant: 2Pai Semiconductor Co., Limited
    Inventor: Zhiwei DONG
  • Publication number: 20210021241
    Abstract: An isolation circuit and a method for providing isolation between two dies are provided. The isolation circuit includes: an isolation module, configured to generate an isolation signal based on an input signal from a first die and to provide isolation between the first die and a second die, where the isolation signal is smaller than the input signal in amplitude, and the first die is coupled with the second die; a latch module, configured to latch the isolation signal at a certain level and output a latched signal; an amplifier module, configured to amplify the latched signal. In the isolation circuit, a modulation module and a demodulation module can be saved.
    Type: Application
    Filed: September 18, 2020
    Publication date: January 21, 2021
    Applicant: 2Pai Semiconductor Co., Limited
    Inventor: Zhiwei DONG
  • Patent number: 10812027
    Abstract: An isolation circuit and a method for providing isolation between two dies are provided. The isolation circuit includes: an isolation module, configured to generate an isolation signal based on an input signal from a first die and to provide isolation between the first die and a second die, where the isolation signal is smaller than the input signal in amplitude, and the first die is coupled with the second die; a latch module, configured to latch the isolation signal at a certain level and output a latched signal; an amplifier module, configured to amplify the latched signal. In the isolation circuit, a modulation module and a demodulation module can be saved.
    Type: Grant
    Filed: May 25, 2018
    Date of Patent: October 20, 2020
    Assignee: 2PAI SEMICONDUCTOR CO., LIMITED
    Inventor: Zhiwei Dong
  • Publication number: 20190214974
    Abstract: A latch and an isolation circuit are provided. The latch includes a first-level substructure and at least one second-level substructure, the number of the at least one second-level substructure is k, and k is a positive integer greater than or equal to 1. The first-level substructure includes a first load having a first terminal coupled with a first port, a second load having a first terminal coupled with the first port, a first driving circuit having a control terminal coupled with a second terminal of the first load and a second terminal coupled with a second port, a second driving circuit having a control terminal coupled with a second terminal of the second load and a second terminal coupled with the second port. Each of the at least one second-level substructure includes a third load, a fourth load, a third driving circuit and a fourth driving circuit.
    Type: Application
    Filed: June 7, 2018
    Publication date: July 11, 2019
    Applicant: 2PAI SEMICONDUCTOR CO., LIMITED
    Inventor: Zhiwei DONG
  • Publication number: 20180342989
    Abstract: An isolation circuit and a method for providing isolation between two dies are provided. The isolation circuit includes: an isolation module, configured to generate an isolation signal based on an input signal from a first die and to provide isolation between the first die and a second die, where the isolation signal is smaller than the input signal in amplitude, and the first die is coupled with the second die; a latch module, configured to latch the isolation signal at a certain level and output a latched signal; an amplifier module, configured to amplify the latched signal. In the isolation circuit, a modulation module and a demodulation module can be saved.
    Type: Application
    Filed: May 25, 2018
    Publication date: November 29, 2018
    Applicant: 2PAI SEMICONDUCTOR CO., LIMITED
    Inventor: Zhiwei DONG
  • Patent number: 8861229
    Abstract: An apparatus includes a regulator circuit that generates a voltage in response to an input current being supplied to an input terminal and functional circuitry, powered by the voltage generated by the regulator circuit. The functional circuitry, e.g., an oscillator, generates a signal using the generated voltage, the signal indicative that the current is being supplied to the apparatus. The signal can be provided over an isolation link to provide a control signal for controlling a high voltage driver circuit.
    Type: Grant
    Filed: May 29, 2008
    Date of Patent: October 14, 2014
    Assignee: Silicon Laboratories Inc.
    Inventors: Donald E. Alfano, Timothy J. Dupuis, Zhiwei Dong, Brett E. Etter
  • Patent number: 8643138
    Abstract: A high breakdown voltage integrated circuit isolator device communicates a digital signal from a signal input on one semiconductor die to a signal output on another semiconductor die while providing high voltage isolation between the signal input and the signal output. Each die may include a respective capacitive isolation barrier structure that couple together via a bonding wire between combined top metal/bonding pads of the capacitive isolation barrier structures.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: February 4, 2014
    Assignee: Silicon Laboratories Inc.
    Inventor: Zhiwei Dong
  • Patent number: 8644365
    Abstract: In one embodiment, a method includes receiving an input signal in transmitter circuitry of a first semiconductor die and processing the input signal, sending the processed input signal to an isolation circuit of the die to generate a voltage isolated signal, and outputting the voltage isolated signal from the isolation circuit to a second semiconductor die coupled to the first semiconductor die via a bonding mechanism. Note that this second semiconductor die may not include isolation circuitry.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: February 4, 2014
    Assignee: Silicon Laboratories Inc.
    Inventor: Zhiwei Dong
  • Publication number: 20130257527
    Abstract: In one embodiment, a method includes receiving an input signal in transmitter circuitry of a first semiconductor die and processing the input signal, sending the processed input signal to an isolation circuit of the die to generate a voltage isolated signal, and outputting the voltage isolated signal from the isolation circuit to a second semiconductor die coupled to the first semiconductor die via a bonding mechanism. Note that this second semiconductor die may not include isolation circuitry.
    Type: Application
    Filed: March 30, 2012
    Publication date: October 3, 2013
    Inventor: Zhiwei Dong
  • Patent number: 8502584
    Abstract: One aspect of the present invention is directed to a circuit that includes an amplifier circuit disposed between an isolation link and a Schmitt trigger circuit to amplify a differential signal communicated over the isolation link and supply the amplified signal to the Schmitt trigger circuit. In turn, the Schmitt trigger circuit is coupled to the amplifier circuit to receive the differential signal and to supply a differential output signal corresponding to the differential signal communicated over the isolation link.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: August 6, 2013
    Assignee: Silicon Laboratories Inc
    Inventors: Zhiwei Dong, Jing Li, Michael L. Duffy, Michael Mills
  • Patent number: 8451032
    Abstract: High voltage isolation capabilities are provided using a first integrated circuit die that includes an inverting circuit path and a non-inverting circuit path coupled to receive a single-ended signal and to generate a differential signal from the single-ended signal for transmission over an isolation link. A second integrated circuit die includes a differential Schmitt trigger circuit coupled to the differential signal communicated over the isolation link and to supply at least one output signal corresponding thereto. An isolation barrier is disposed between the inverting and non-inverting circuit paths and the differential Schmitt trigger circuit and includes at least two isolation capacitors coupled to respectively transmit each portion of the differential signal.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: May 28, 2013
    Assignee: Silicon Laboratories Inc.
    Inventors: Zhiwei Dong, Ka Y. Leung
  • Patent number: 8441325
    Abstract: An isolator that includes first and second substantially identical circuitry galvanically isolated from each other and each having at least one communications channel thereon for communicating signals across an isolation boundary therebetween and each of said first and second circuitry having configurable functionality associated with the operation thereof. A coupling device is provided for coupling signal across the isolation boundary between the at least one communication channels of the first and second circuitry. First and second configuration memories are provided, each associated with a respective one of the first and second circuitry. First and second configuration control devices are provided, each associated with a respective one of the first and second circuitry and each configuring the functionality of the associated one of the first and second circuitry.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: May 14, 2013
    Assignee: Silicon Laboratories Inc.
    Inventors: Phil A. Callahan, Ahsan Javed, Zhiwei Dong, Axel Thomsen, Donald E. Alfano, Timothy Dupuis, Ka Y. Leung
  • Publication number: 20130001738
    Abstract: A high breakdown voltage integrated circuit isolator device communicates a digital signal from a signal input on one semiconductor die to a signal output on another semiconductor die while providing high voltage isolation between the signal input and the signal output. Each die may include a respective capacitive isolation barrier structure that couple together via a bonding wire between combined top metal/bonding pads of the capacitive isolation barrier structures.
    Type: Application
    Filed: June 30, 2011
    Publication date: January 3, 2013
    Applicant: SILICON LABORATORIES, INC.
    Inventor: Zhiwei Dong
  • Publication number: 20120241905
    Abstract: An integrated circuit includes a conductive substrate pick-up region in the substrate that forms a perimeter around a portion of the substrate. Conductive stripes traverse the portion of the substrate within the perimeter and are coupled to a low impedance node along with the substrate pick-up region. A capacitor has a bottom plate formed above the conductive stripes. The pick-up region and the conductive stripes absorb injected current caused by parasitic capacitance between the bottom plate of the capacitor and the substrate region thereby reducing cross-talk caused by the injected current.
    Type: Application
    Filed: March 25, 2011
    Publication date: September 27, 2012
    Inventors: William W.K. Tang, Shouli Yan, Zhiwei Dong