Abstract: An array substrate and a manufacturing method therefor, and a display panel. The array substrate includes a substrate, a first transistor and a photosensitive element; the first transistor and the photosensitive element are disposed on the substrate; the first transistor and the photosensitive element are electrically connected; the first transistor includes a first gate, a first active layer, a second gate stacked, and a source and a drain; the source and the drain are electrically connected to the first active layer respectively; the photosensitive element includes a first electrode, a photosensitive layer, and a second electrode stacked; the first electrode is disposed in the same layer as the second gate, and are electrically connected to the source or drain.

Abstract: The present invention discloses a fully bio-based, highly filled lignin-rubber masterbatch, a method for preparing same, and use thereof. The lignin-rubber masterbatch is prepared by a method comprising: (1) reacting a lignin, acetic acid, and oleic acid in the presence of a catalyst to give a modified lignin; and (2) blending the modified lignin and a rubber, and granulating to give the lignin-rubber masterbatch. The highly filled lignin-rubber masterbatch prepared by the present invention can replace the conventional reinforcing agent carbon black and provide a better reinforcing effect and higher mechanical properties for rubber materials. The present invention can also reduce the rubber content of the rubber composite materials while retaining the mechanical properties, thus featuring cost-efficiency.

Abstract: The present application provides a signal amplifying circuit and a display device. In the signal amplifying circuit, a gate of a driving transistor of a first inverter is connected to an output terminal of a reset module, and thereby a potential of the gate of the driving transistor of the first inverter changes when an impedance of an optoelectronic device changes, so that a potential change of each node of the first inverter amplifies the signal. Besides, a first compensation transistor is connected between a second gate of the first driving transistor and a first output node, and the potential of the first output node precharges to the second gate of the first driving transistor to adjust a threshold voltage of the first driving transistor, thereby erasing the difference of the threshold voltages in different transistors, and solving the technical problem of bad uniformity of signals amplified by the inverter.

Abstract: Disclosed are sodium salts of pyrimidine derivatives, and a series of crystal forms thereof. The series of crystal forms exhibit a good druggability, such as stability, fluidity, compressibility, etc., and provide a variety of options of APIs for subsequent drug product development.

Abstract: A semiconductor device and a photosensitive device are provided. The semiconductor device includes a substrate and a photosensitive thin film transistor. The photosensitive thin film transistor includes a first metal layer, an insulating layer, a photosensitive semiconductor layer, a photosensitive ohmic contact layer, and a second metal layer. At least one side of the photosensitive ohmic contact layer protrudes from the second metal layer arranged on it, which increases an irradiated area of the photosensitive ohmic contact layer, thereby improving a photo-responsiveness of the photosensitive thin film transistor.

Abstract: The present disclosure provides an array substrate and a display panel including the same. The array substrate includes a plurality of pixel units. Each of the pixel units includes a main pixel electrode, a sub-pixel electrode, a first thin film transistor (TFT) electrically connected to the sub-pixel electrode, a second TFT electrically connected to the first TFT, and a third TFT electrically connected to the main pixel electrode. The first TFT includes a first channel and a first semiconductor layer. The first channel includes two or more subchannels. The first semiconductor layer includes two or more semiconductor sublayers. Each of the semiconductor sublayers is disposed in a corresponding subchannel.

Abstract: The present disclosure provides an array substrate and a manufacturing method of the array substrate. In the manufacturing method of the array substrate, during performing a first wet etching and a second wet etching on a second metal layer, the wet etching is stopped when a copper conductive layer is merely etched completely. Because a wet etching speed of a liner layer is slow, an etching time of the wet etching and a CD loss of the copper conductive layer can be greatly reduced, and the CD loss is relatively small. Meanwhile, an entire CD loss of the second metal layer can be reduced, and an aperture ratio can be improved.

Abstract: The present disclosure provides an array substrate and a display panel including the same. The array substrate includes a plurality of pixel units. Each of the pixel units includes a main pixel electrode, a sub-pixel electrode, a first thin film transistor (TFT) electrically connected to the sub-pixel electrode, a second TFT electrically connected to the first TFT, and a third TFT electrically connected to the main pixel electrode. The first TFT includes a first channel and a first semiconductor layer. The first channel includes two or more subchannels. The first semiconductor layer includes two or more semiconductor sublayers. Each of the semiconductor sublayers is disposed in a corresponding subchannel.

Abstract: The present disclosure provides an array substrate and a manufacturing method of the array substrate. In the manufacturing method of the array substrate, during performing a first wet etching and a second wet etching on a second metal layer, the wet etching is stopped when a copper conductive layer is merely etched completely. Because a wet etching speed of a liner layer is slow, an etching time of the wet etching and a CD loss of the copper conductive layer can be greatly reduced, and the CD loss is relatively small. Meanwhile, an entire CD loss of the second metal layer can be reduced, and an aperture ratio can be improved.

Abstract: A method of manufacturing a light emitting panel, a light emitting panel, and a display device are disclosed. The method includes providing a substrate, forming a first metal layer on the substrate, performing an oxidation process to the first metal layer to form an oxide layer on the first metal layer, forming a photoresist layer on the oxide layer, patterning the photoresist layer, the oxide layer, and the substrate, and stripping a patterned photoresist layer, and sequentially forming a first passivation layer, a color resist layer, a second passivation layer, and an indium tin oxide film layer on the oxide layer.

Abstract: A thin film transistor (TFT) and a method of manufacturing same are provided. A photoresist layer is dry-etched to form a tunnel before an active layer is formed, wherein a bottom of the tunnel is a copper trace layer. After that, two edges of the photoresist layer are aligned with two edges of the copper trace layer. Therefore, the photoresist layer won't protrude over an amorphous silicon layer to block the etching gas from etching the amorphous silicon layer. As a result, an aperture ratio of the TFT is increased, and quality of the TFT is improved. By forming an oxidation protective layer on the tunnel, the copper trace layer is prevented from being reacted with the etching gas to form a compound. Therefore, metals or compounds on the tunnel can be completely etched, and quality of the TFT is further improved.

Abstract: A thin film transistor (TFT) and a method of manufacturing same are provided. A photoresist layer is dry-etched to form a tunnel before an active layer is formed, wherein a bottom of the tunnel is a copper trace layer. After that, two edges of the photoresist layer are aligned with two edges of the copper trace layer. Therefore, the photoresist layer won't protrude over an amorphous silicon layer to block the etching gas from etching the amorphous silicon layer. As a result, an aperture ratio of the TFT is increased, and quality of the TFT is improved. By forming an oxidation protective layer on the tunnel, the copper trace layer is prevented from being reacted with the etching gas to form a compound. Therefore, metals or compounds on the tunnel can be completely etched, and quality of the TFT is further improved.

Abstract: An array substrate, a manufacturing method and a display panel thereof are provided. A single mask process is used for completing formation of a flat layer and a pixel definition layer, or the flat layer, the pixel definition layer and a spacer. A light emitting unit is located within an anode so that the light of the emitting unit is reflected by the anode to accumulate. The risk of color mixing on the display panel is reduced, and the light intensity on the light exit side is enhanced.

Abstract: An array substrate, a manufacturing method thereof, and a display panel are provided in the present application. A gate electrode and source and drain electrodes of different thickness are formed on an electroplated substrate by metal electroplating. By using a height difference between the gate electrode and the source and drain electrodes, a dielectric layer covering the gate electrode and exposing the source and drain electrodes is formed on a substrate, so that an active layer is electrically connected to the source and drain electrodes. Moreover, separation is realized by means of the dielectric layer and the gate electrode, so an etching stop layer is not needed, which simplifies an IGZO manufacturing process and reduces production costs.

Abstract: A thin-film transistor and a manufacturing method for the same are disclosed.

Abstract: A method of manufacturing a light emitting panel, a light emitting panel, and a display device are disclosed. The method includes providing a substrate, forming a first metal layer on the substrate, performing an oxidation process to the first metal layer to form an oxide layer on the first metal layer, forming a photoresist layer on the oxide layer, patterning the photoresist layer, the oxide layer, and the substrate, and stripping a patterned photoresist layer, and sequentially forming a first passivation layer, a color resist layer, a second passivation layer, and an indium tin oxide film layer on the oxide layer.

Abstract: A thin-film transistor and a manufacturing method for the same are disclosed.

Abstract: The present disclosure discloses a manufacturing method of a thin film transistor, including: forming a gate layer on a substrate; forming a gate insulating layer on the gate layer and the substrate; forming an active layer on the gate insulating layer; and simultaneously forming a source and a drain formed on the active layer by a combination of a chemical plating method and a lift-off method. In the present disclosure, the chemical plating method is combined with the lift-off method, so that the wet-etching method is not used for forming the source and the drain, and thus the IGZO at the channel is not required to be protected by the etching-stop-layer. Therefore, while simplifying the production process, but also can reduce costs.

Abstract: The present disclosure discloses a manufacturing method of a thin film transistor, including: forming a gate layer on a substrate; forming a gate insulating layer on the gate layer and the substrate; forming an active layer on the gate insulating layer; and simultaneously forming a source and a drain formed on the active layer by a combination of a chemical plating method and a lift-off method. In the present disclosure, the chemical plating method is combined with the lift-off method, so that the wet-etching method is not used for forming the source and the drain, and thus the IGZO at the channel is not required to be protected by the etching-stop-layer. Therefore, while simplifying the production process, but also can reduce costs.

Abstract: The present invention provides a manufacturing method of an array substrate and an array substrate. The manufacturing method of the array substrate according to the present invention combines the COA technology and the BOA technology, where a black matrix is first formed on a backing plate, followed by forming a top-gate TFT device on the black matrix, and finally forming a color filter layer on the TFT device, wherein the pixel electrode is directly arranged on the drain electrode and connected with the drain electrode. The manufacturing method helps enhance electrical performance of a TFT device and stability of performance, improves quality of a display panel, and, compared to an existing array substrate manufacturing method, reduces masks and operations involved. The manufacturing method is simple and helps reduce manufacturing costs.