Patents by Inventor Zhiwen LUO

Zhiwen LUO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11930677
    Abstract: A display panel and a fabricating method thereof, and a displaying device. The display panel includes a substrate, a resistance reducing trace, an inter-layer-medium layer and a signal line. The substrate is divided into a plurality of sub-pixel regions and a pixel separating region. The resistance reducing trace is provided on the pixel separating region of the substrate. The inter-layer-medium layer is provided on the substrate, and the inter-layer-medium layer has an opening exposing the resistance reducing trace. The signal line is provided within the opening, the signal line is connected to the resistance reducing trace, the signal line is distributed in a column direction along the display panel, and in a row direction along the display panel, a width of the opening is greater than or equal to a width of the signal line.
    Type: Grant
    Filed: May 25, 2021
    Date of Patent: March 12, 2024
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yongchao Huang, Can Yuan, Liusong Ni, Chao Wang, Jiawen Song, Zhiwen Luo, Jun Liu, Leilei Cheng, Qinghe Wang, Tao Sun
  • Patent number: 11882716
    Abstract: A method for manufacturing a display panel includes: sequentially forming a conductive pattern, a light-emitting layer and a cathode layer on a substrate. The conductive pattern is formed by a one-time patterning process, and includes an auxiliary electrode layer. In a direction parallel to the substrate, both the first protective electrode and the second protective electrode in the auxiliary electrode layer extend over the metal electrode, a second orthographic projection of the second protective electrode on the substrate is within a first orthographic projection of the first protective electrode on the substrate, and an outer boundary of the second orthographic projection is staggered from an outer boundary of the first orthographic projection. The cathode layer is in contact with the first protective electrode and a sidewall of the metal electrode.
    Type: Grant
    Filed: June 2, 2021
    Date of Patent: January 23, 2024
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yang Zhang, Ning Liu, Bin Zhou, Leilei Cheng, Liangchen Yan, Jun Liu, Qinghe Wang, Tao Sun, Zhiwen Luo
  • Publication number: 20220293709
    Abstract: The present disclosure provides an array substrate, a manufacturing method thereof, and a display device including the array substrate. The array substrate includes a substrate, a first electrode on the substrate, a light-emitting layer on a side of the first electrode away from the substrate, a second electrode on a side of the light-emitting layer away from the first electrode, and an auxiliary electrode on the side of the light-emitting layer away from the first electrode and electrically connected with the second electrode.
    Type: Application
    Filed: April 8, 2021
    Publication date: September 15, 2022
    Inventors: Tongshang SU, Jun CHENG, Qinghe WANG, Yongchao HUANG, Chao WANG, Zhiwen LUO, Liangchen YAN
  • Publication number: 20220115493
    Abstract: A display panel and a fabricating method thereof, and a displaying device. The display panel includes a substrate, a resistance reducing trace, an inter-layer-medium layer and a signal line. The substrate is divided into a plurality of sub-pixel regions and a pixel separating region. The resistance reducing trace is provided on the pixel separating region of the substrate. The inter-layer-medium layer is provided on the substrate, and the inter-layer-medium layer has an opening exposing the resistance reducing trace. The signal line is provided within the opening, the signal line is connected to the resistance reducing trace, the signal line is distributed in a column direction along the display panel, and in a row direction along the display panel, a width of the opening is greater than or equal to a width of the signal line.
    Type: Application
    Filed: May 25, 2021
    Publication date: April 14, 2022
    Applicants: Hefei Xinsheng Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Yongchao Huang, Can Yuan, Liusong Ni, Chao Wang, Jiawen Song, Zhiwen Luo, Jun Liu, Leilei Cheng, Qinghe Wang, Tao Sun
  • Publication number: 20220093893
    Abstract: A method for manufacturing a display panel includes: sequentially forming a conductive pattern, a light-emitting layer and a cathode layer on a substrate. The conductive pattern is formed by a one-time patterning process, and includes an auxiliary electrode layer. In a direction parallel to the substrate, both the first protective electrode and the second protective electrode in the auxiliary electrode layer extend over the metal electrode, a second orthographic projection of the second protective electrode on the substrate is within a first orthographic projection of the first protective electrode on the substrate, and an outer boundary of the second orthographic projection is staggered from an outer boundary of the first orthographic projection. The cathode layer is in contact with the first protective electrode and a sidewall of the metal electrode.
    Type: Application
    Filed: June 2, 2021
    Publication date: March 24, 2022
    Inventors: Yang Zhang, Ning Liu, Bin Zhou, Leilei Cheng, Liangchen Yan, Jun Liu, Qinghe Wang, Tao Sun, Zhiwen Luo
  • Publication number: 20210227656
    Abstract: A thin-film transistor includes: an active layer having a first side and a second side opposing to the first side; a main gate electrode spaced from the active layer on the first side, and including a conductive material; an auxiliary gate electrode spaced from the active layer on the second side, wherein the auxiliary gate electrode includes a phase change material having a phase change temperature; the auxiliary gate electrode is configured to have a transition between insulating and conductive based on a temperature of the auxiliary gate electrode; and the main gate electrode and the auxiliary gate electrode are electrically coupled to each other when the auxiliary gate electrode is conductive.
    Type: Application
    Filed: October 21, 2019
    Publication date: July 22, 2021
    Applicants: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Qinghe WANG, Dongfang WANG, Tongshang SU, Ning LIU, Guangyao LI, Yongchao HUANG, Yang ZHANG, Jiawen SONG, Zhiwen LUO, Liangchen YAN