Abstract: A system, power supplies, controller and method for enhanced phase current sharing are disclosed. For example, a power supply for enhanced phase current sharing is disclosed, which includes a plurality of power modules, a communication bus coupled to an input of each power module of the plurality power modules, and an output voltage node coupled to a first side of an inductor of each power module of the plurality of power modules, wherein each power module of the plurality of power modules includes a digital controller coupled to the input of the power module, and an RC circuit enabled to generate a feedback signal, coupled to a second side of the inductor and the output voltage node. In some implementations, the power supply is at least part of a power management integrated circuit (PMIC) or at least part of a power supply formed on a semiconductor IC, wafer, chip or die.

Abstract: A system, power supplies, controller and method for enhanced phase current sharing are disclosed. For example, a power supply for enhanced phase current sharing is disclosed, which includes a plurality of power modules, a communication bus coupled to an input of each power module of the plurality power modules, and an output voltage node coupled to a first side of an inductor of each power module of the plurality of power modules, wherein each power module of the plurality of power modules includes a digital controller coupled to the input of the power module, and an RC circuit enabled to generate a feedback signal, coupled to a second side of the inductor and the output voltage node. In some implementations, the power supply is at least part of a power management integrated circuit (PMIC) or at least part of a power supply formed on a semiconductor IC, wafer, chip or die.

Abstract: Auto-compensation—for compensating voltage regulators generating a regulated output voltage—may be performed dynamically by determining various coefficients of a compensation function used in compensating the power regulator, based at least on assumptions about the structure of the regulator and corresponding filters. At least the DC loop gain and the position of the compensation zeros may be determined without requiring any prior knowledge of the values of the various components of the system. The compensator coefficients may be adjusted based on duty-cycle jitter information, which may be accurately obtained/measured at a high signal-to-noise ratio. By observing the duty-cycle jitter, the capacitor (equivalent series resistance) may be optimally compensated by tuning the 0 dB crossover slope of the loop gain. Accordingly, auto-compensation may be performed by measuring the duty-cycle jitter while maintaining optimum stability and transient performance.

Abstract: A system, power supplies, controller and method for enhanced phase current sharing are disclosed. For example, a power supply for enhanced phase current sharing is disclosed, which includes a plurality of power modules, a communication bus coupled to an input of each power module of the plurality power modules, and an output voltage node coupled to a first side of an inductor of each power module of the plurality of power modules, wherein each power module of the plurality of power modules includes a digital controller coupled to the input of the power module, and an RC circuit enabled to generate a feedback signal, coupled to a second side of the inductor and the output voltage node. In some implementations, the power supply is at least part of a power management integrated circuit (PMIC) or at least part of a power supply formed on a semiconductor IC, wafer, chip or die.

Abstract: Auto-compensation—for compensating voltage regulators generating a regulated output voltage—may be performed dynamically by determining various coefficients of a compensation function used in compensating the power regulator, based at least on assumptions about the structure of the regulator and corresponding filters. At least the DC loop gain and the position of the compensation zeros may be determined without requiring any prior knowledge of the values of the various components of the system. The compensator coefficients may be adjusted based on duty-cycle jitter information, which may be accurately obtained/measured at a high signal-to-noise ratio. By observing the duty-cycle jitter, the capacitor (equivalent series resistance) may be optimally compensated by tuning the 0 dB crossover slope of the loop gain. Accordingly, auto-compensation may be performed by measuring the duty-cycle jitter while maintaining optimum stability and transient performance.

Abstract: A modulator configured to control switching of current through an inductor of a converter according to a current limiting scheme while converting an input voltage to an output voltage, which includes a current limit generator and a comparator network. The current limit generator is configured to provide a periodic ramping current limit value based on either the input voltage or the output voltage, an inductance of the inductor, a timing signal, and a predetermined maximum output current of the boost converter. The comparator network is configured to provide a switch control signal to control switching of current through the inductor by comparing a current sense value indicative of a current through the inductor with a lesser of a compensation error value and the periodic ramping current limit value. The converter may be configured as a peak current mode control converter in either boost or buck mode.

Abstract: The various embodiments may include a power supply having a first loop in communication with a power stage of the power supply. A second loop in communication with the first loop may generate a negative reactance value that increases a power factor for the power supply to approximately one. A power supply may also include a rectifier coupleable to an input supply. A power factor compensation circuit coupled to the rectifier may generate a negative reactance. The negative reactance may reduce a phase angle between a current and a voltage provided to the input supply. A method may include sensing an output of a power supply, and adjusting the sensed value. The adjusted value may be compared to a reference value to generate an error value. The error value and a negative reactance value may be combined and the result may be provided to the power supply.

Abstract: A system, power supplies, controller and method for enhanced phase current sharing are disclosed. For example, a power supply for enhanced phase current sharing is disclosed, which includes a plurality of power modules, a communication bus coupled to an input of each power module of the plurality power modules, and an output voltage node coupled to a first side of an inductor of each power module of the plurality of power modules, wherein each power module of the plurality of power modules includes a digital controller coupled to the input of the power module, and an RC circuit enabled to generate a feedback signal, coupled to a second side of the inductor and the output voltage node. In some implementations, the power supply is at least part of a power management integrated circuit (PMIC) or at least part of a power supply formed on a semiconductor IC, wafer, chip or die.

Abstract: A modulator configured to control switching of current through an inductor of a converter according to a current limiting scheme while converting an input voltage to an output voltage, which includes a current limit generator and a comparator network. The current limit generator is configured to provide a periodic ramping current limit value based on either the input voltage or the output voltage, an inductance of the inductor, a timing signal, and a predetermined maximum output current of the boost converter. The comparator network is configured to provide a switch control signal to control switching of current through the inductor by comparing a current sense value indicative of a current through the inductor with a lesser of a compensation error value and the periodic ramping current limit value. The converter may be configured as a peak current mode control converter in either boost or buck mode.

Abstract: A power supply including an AC input, a filter, a full wave rectifier, a converter, a second rectifier, and a bias system. The filter includes at least one differential capacitor coupled to the AC input. The full wave rectifier develops a DC bus voltage on a DC bus node. The converter includes a controller and operates to convert the DC bus voltage to a regulated output voltage. The second rectifier is coupled to the AC input for developing a DC bias voltage on a DC bias node. The bias system is coupled between the DC bias node and a reference node and provides at least one start-up voltage to the controller, such as a supply voltage or a sense voltage or the like. The bias circuit includes at least one current discharge path for discharging each differential capacitor within a predetermined time period when AC line voltage is removed.

Abstract: A power supply including a converter, a capacitance, and a hiccup control module. The converter converts an input voltage to both an output voltage and a preliminary standby voltage when in its active state. The capacitance stores the preliminary standby voltage which is charged to an upper voltage level when the converter is in its active state and which is discharged to a lower voltage level when the converter is in its inactive state. During the standby mode, the hiccup control module operates the converter in hiccup mode by toggling between placing the converter into its inactive state when the preliminary standby voltage is charged to the upper voltage level and placing the converter into its active state when the preliminary standby voltage is discharged to the lower voltage level. The hiccup mode of the power supply eliminates a need for a separate standby converter.

Abstract: The various embodiments may include a power supply having a first loop in communication with a power stage of the power supply. A second loop in communication with the first loop may generate a negative reactance value that increases a power factor for the power supply to approximately one. A power supply may also include a rectifier coupleable to an input supply. A power factor compensation circuit coupled to the rectifier may generate a negative reactance. The negative reactance may reduce a phase angle between a current and a voltage provided to the input supply. A method may include sensing an output of a power supply, and adjusting the sensed value. The adjusted value may be compared to a reference value to generate an error value. The error value and a negative reactance value may be combined and the result may be provided to the power supply.

Abstract: A DC/DC voltage converter includes a transformer having a primary side and a secondary side. Primary side circuitry is connected to the primary side and includes a first pair of switching transistors controlled responsive to first control signals from the primary side of the transformer and receiving an input voltage. Secondary side circuitry is connected to the secondary side and includes a second pair of switching transistors controlled responsive to second control signals from the secondary side of the transformer and providing an output voltage. Driver circuitry generates the second control signals responsive to drain and source voltages at each of the second pair of switching transistors and a first and second PWM control signals. Signal shaping circuitry provides the first and second PWM control signals responsive to a drain voltage of each of the second pair of switching transistors.

Abstract: A power supply including a converter, a capacitance, and a hiccup control module. The converter converts an input voltage to both an output voltage and a preliminary standby voltage when in its active state. The capacitance stores the preliminary standby voltage which is charged to an upper voltage level when the converter is in its active state and which is discharged to a lower voltage level when the converter is in its inactive state. During the standby mode, the hiccup control module operates the converter in hiccup mode by toggling between placing the converter into its inactive state when the preliminary standby voltage is charged to the upper voltage level and placing the converter into its active state when the preliminary standby voltage is discharged to the lower voltage level. The hiccup mode of the power supply eliminates a need for a separate standby converter.

Abstract: A power supply including an AC input, a filter, a full wave rectifier, a converter, a second rectifier, and a bias system. The filter includes at least one differential capacitor coupled to the AC input. The full wave rectifier develops a DC bus voltage on a DC bus node. The converter includes a controller and operates to convert the DC bus voltage to a regulated output voltage. The second rectifier is coupled to the AC input for developing a DC bias voltage on a DC bias node. The bias system is coupled between the DC bias node and a reference node and provides at least one start-up voltage to the controller, such as a supply voltage or a sense voltage or the like. The bias circuit includes at least one current discharge path for discharging each differential capacitor within a predetermined time period when AC line voltage is removed.

Abstract: An adaptive pulse positioning system for a voltage converter including an adjustable ramp generator, a pulse generator circuit, and a sense and adjust circuit. The adjustable ramp generator has an adjust input and provides a periodic ramp voltage having an adjustable magnitude based on an adjust signal provided to the adjust input. The pulse generator circuit receives the ramp voltage and generates a pulse signal with control pulses for controlling the output voltage of the voltage controller based on the ramp voltage. The sense and adjust circuit senses an output load transient and provides the adjust signal to the adjust input of the ramp generator to adaptively shift the pulse signal in time in response to the output load transient without adding pulses to the pulse signal.

Abstract: An adaptive pulse positioning system for a voltage converter including an adjustable ramp generator, a pulse generator circuit, and a sense and adjust circuit. The adjustable ramp generator has an adjust input and provides a periodic ramp voltage having an adjustable magnitude based on an adjust signal provided to the adjust input. The pulse generator circuit receives the ramp voltage and generates a pulse signal with control pulses for controlling the output voltage of the voltage controller based on the ramp voltage. The sense and adjust circuit senses an output load transient and provides the adjust signal to the adjust input of the ramp generator to adaptively shift the pulse signal in time in response to the output load transient without adding pulses to the pulse signal.

Abstract: A PWM control circuit for a voltage regulator including a compensation network, a ramp generator providing a ramp voltage, an offset adjust circuit and a comparator circuit. The compensation network senses the output voltage, receives a reference voltage, and outputs a compensation voltage. The offset adjust circuit adjusts a selected one of the ramp voltage and the compensation voltage based on the reference voltage. The comparator circuit compares the compensation voltage with the ramp voltage and provides a PWM signal for controlling the output voltage. The offset adjust circuit may generate an offset voltage based on the reference voltage and a gain G of the voltage regulator. The offset adjust circuit may subtract the offset voltage from either the ramp voltage or the compensation voltage to provide an adjusted voltage to the comparator circuit.

Abstract: A dual-edge modulation controller including first and second ramp circuits, first and second comparators, an error amplifier and pulse control logic. The first ramp circuit provides a leading-edge ramp synchronous with a clock. The error amplifier compares a feedback signal with a reference and provides a compensation signal. The first comparator compares the leading-edge ramp with the compensation signal and asserts a set signal. The second ramp circuit provides a trailing-edge ramp that begins ramping when the set signal is asserted. The second comparator compares the trailing-edge ramp with the compensation signal and asserts a reset signal. The pulse control logic asserts a PWM signal when the set signal is asserted and de-asserts the PWM signal when the reset signal is asserted. The controller may control multiple phases with current balancing. The slew rate of the ramps may be adjusted based on the number of PWM signal asserted.

Abstract: An adaptive pulse positioning system for a voltage converter providing an output voltage, the system including a PWM generation circuit, a sensor, and a pulse positioning circuit. The PWM generation circuit generates a PWM signal with PWM pulses for controlling the output voltage of the voltage controller. The sensor senses an output load condition of the voltage converter and provides a load signal indicative thereof. The pulse positioning circuit adaptively positions the PWM pulses based on the load signal. A method of adaptively positioning PWM pulses that are used to control an output voltage of a voltage regulator including generating a series of PWM pulses based on a clock signal, sensing an output load condition, and adaptively shifting the series of PWM pulses based on the output load condition.