Patents by Inventor Zhixing Ren

Zhixing Ren has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11640195
    Abstract: A power management system may provide power management recommendations to a computer system including a plurality of computing nodes (which may include processors, etc.), to cause the computing nodes to individually or collectively adjust power states or modes of respective processors to achieve power management of the computer system. The power management system may be provided with a power management framework that continuously utilizes direct and indirect service-level feedbacks to guide power management decisions. The power management system may employ a reinforcement learning algorithm to make power management decisions at a user level, and provide a fast decision overriding mechanism for platform events or service-requested performance boosts.
    Type: Grant
    Filed: October 12, 2020
    Date of Patent: May 2, 2023
    Assignee: Alibaba Group Holding Limited
    Inventors: Qingda Lu, Jun Song, Zhu Pang, Jiesheng Wu, Zhixing Ren
  • Publication number: 20220113785
    Abstract: A power management system may provide power management recommendations to a computer system including a plurality of computing nodes (which may include processors, etc.), to cause the computing nodes to individually or collectively adjust power states or modes of respective processors to achieve power management of the computer system. The power management system may be provided with a power management framework that continuously utilizes direct and indirect service-level feedbacks to guide power management decisions. The power management system may employ a reinforcement learning algorithm to make power management decisions at a user level, and provide a fast decision overriding mechanism for platform events or service-requested performance boosts.
    Type: Application
    Filed: October 12, 2020
    Publication date: April 14, 2022
    Inventors: Qingda Lu, Jun Song, Zhu Pang, Jiesheng Wu, Zhixing Ren
  • Patent number: 8375375
    Abstract: A method and system of auto parallelization of zero-trip loops that substitutes a nested basic linear induction variable by exploiting a parallelizing compiler is provided. Provided is a use of a max{0,N} variable for loop iterations in case of no information is known about the value of N, for a typical loop iterating from 1 to N, in which N is the loop invariant. For the nested basic induction variables, an induction variable substitution process is applied to the nested loops starting from the innermost loop to the outermost one. Then a removal of the max operator afterwards through a copy propagation pass of the IBM compiler is provided. In doing so, the loop dependency on the induction variable is eliminated and an opportunity for a parallelizing compiler to parallel the outermost loop is provided.
    Type: Grant
    Filed: January 21, 2009
    Date of Patent: February 12, 2013
    Assignee: International Business Machines Corporation
    Inventors: Zhixing Ren, Raul Esteban Silvera, Guansong Zhang
  • Patent number: 8037462
    Abstract: A method for providing parallel processing capabilities including: performing scalar and array privatization analysis via a compiler; checking whether an assignment statement is reducible; recognizing reduction patterns through a pattern matching algorithm; classifying a reduction type of each of the reduction patterns; and performing transformations and code generation for each reduction the reduction type of each of the reduction patterns.
    Type: Grant
    Filed: August 2, 2006
    Date of Patent: October 11, 2011
    Assignee: International Business Machines Corporation
    Inventors: Roch G. Archambault, Yaoqing Gao, Zhixing Ren, Raul E. Silvera
  • Publication number: 20090158018
    Abstract: A method and system of auto parallelization of zero-trip loops that substitutes a nested basic linear induction variable by exploiting a parallelizing compiler is provided. Provided is a use of a max{0,N} variable for loop iterations in case of no information is known about the value of N, for a typical loop iterating from 1 to N, in which N is the loop invariant. For the nested basic induction variables, an induction variable substitution process is applied to the nested loops starting from the innermost loop to the outermost one. Then a removal of the max operator afterwards through a copy propagation pass of the IBM compiler is provided. In doing so, the loop dependency on the induction variable is eliminated and an opportunity for a parallelizing compiler to parallel the outermost loop is provided.
    Type: Application
    Filed: January 21, 2009
    Publication date: June 18, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Zhixing Ren, Raul Esteban Silvera, Guansong Zhang
  • Patent number: 7487497
    Abstract: A method and system of auto parallelization of zero-trip loops that substitutes a nested basic linear induction variable by exploiting a parallelizing compiler is provided. Provided is a use of a max{0,N} variable for loop iterations in case of no information is known about the value of N, for a typical loop iterating from 1 to N, in which N is the loop invariant. For the nested basic induction variables, an induction variable substitution process is applied to the nested loops starting from the innermost loop to the outermost one. Then a removal of the max operator afterwards through a copy propagation pass of the IBM compiler is provided. In doing so, the loop dependency on the induction variable is eliminated and an opportunity for a parallelizing compiler to parallel the outermost loop is provided.
    Type: Grant
    Filed: August 26, 2004
    Date of Patent: February 3, 2009
    Assignee: International Business Machines Corporation
    Inventors: Zhixing Ren, Raul Esteban Silvera, Guansong Zhang
  • Publication number: 20080052689
    Abstract: A method for providing parallel processing capabilities including: performing scalar and array privatization analysis via a compiler; checking whether an assignment statement is reducible; recognizing reduction patterns through a pattern matching algorithm; classifying a reduction type of each of the reduction patterns; and performing transformations and code generation for each reduction the reduction type of each of the reduction patterns.
    Type: Application
    Filed: August 2, 2006
    Publication date: February 28, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Roch G. Archambault, Yaoqing Gao, Zhixing Ren, Raul E. Silvera
  • Publication number: 20060048119
    Abstract: A method and system of auto parallelization of zero-trip loops that substitutes a nested basic linear induction variable by exploiting a parallelizing compiler is provided. Provided is a use of a max{0,N} variable for loop iterations in case of no information is known about the value of N, for a typical loop iterating from 1 to N, in which N is the loop invariant. For the nested basic induction variables, an induction variable substitution process is applied to the nested loops starting from the innermost loop to the outermost one. Then a removal of the max operator afterwards through a copy propagation pass of the IBM compiler is provided. In doing so, the loop dependency on the induction variable is eliminated and an opportunity for a parallelizing compiler to parallel the outermost loop is provided.
    Type: Application
    Filed: August 26, 2004
    Publication date: March 2, 2006
    Applicant: International Business Machines Corporation
    Inventors: Zhixing Ren, Raul Silvera, Guansong Zhang