Patents by Inventor Zhi-Xiong Jiang

Zhi-Xiong Jiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100193847
    Abstract: A semiconductor fabrication process for forming a gate electrode for a metal-oxide-semiconductor (MOS) transistor includes forming a gate electrode layer of an electrically conductive ceramic, e.g., titanium nitride, overlying a gate dielectric layer, e.g., a high K dielectric. A gate barrier layer is then formed overlying the gate electrode layer. The gate barrier layer may be a metal or transition metal material including, as an example, titanium. Portions of the gate electrode layer and the gate barrier layer are then etched or otherwise removed to form the gate electrode.
    Type: Application
    Filed: January 30, 2009
    Publication date: August 5, 2010
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Zhi-Xiong Jiang, Kyuhwan H. Chang, Kiwoon Kim
  • Patent number: 7592273
    Abstract: A method of forming a semiconductor device comprises providing a portion of a semiconductor device structure, wherein the portion includes a region susceptible to hydrogen incorporation due to subsequent device processing. For example, the subsequent device processing can include one or more of (i) forming a layer over the region, wherein the layer includes hydrogen and (ii) using gases containing hydrogen in a plasma for the subsequent device processing, wherein the semiconductor device is subject to an undesirable device characteristic alteration by hydrogen incorporation into the region. The method further comprises forming a hydrogen barrier layer overlying the region, wherein the hydrogen barrier layer prevents substantial migration of hydrogen made available due to the subsequent device processing into the underlying region. The method further includes performing the subsequent device processing.
    Type: Grant
    Filed: April 19, 2007
    Date of Patent: September 22, 2009
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Stanley M. Filipiak, Zhi-Xiong Jiang, Mehul D. Shroff
  • Publication number: 20090032704
    Abstract: A method for measuring the thickness of a layer is provided, comprising (a) providing a structure (101) comprising a first layer disposed on a second layer; (b) impinging (103) the structure with a first ion beam comprising a first isotope, thereby sputtering off a portion of the first layer which contains a second isotope and exposing a portion of the second layer; and (c) determining (105) the thickness of the first layer by measuring the amount of the second isotope which is sputtered off.
    Type: Application
    Filed: August 1, 2007
    Publication date: February 5, 2009
    Inventors: Zhi-Xiong Jiang (Jack), David D. Sieloff
  • Publication number: 20080261407
    Abstract: A method of forming a semiconductor device comprises providing a portion of a semiconductor device structure, wherein the portion includes a region susceptible to hydrogen incorporation due to subsequent device processing. For example, the subsequent device processing can include one or more of (i) forming a layer over the region, wherein the layer includes hydrogen and (ii) using gases containing hydrogen in a plasma for the subsequent device processing, wherein the semiconductor device is subject to an undesirable device characteristic alteration by hydrogen incorporation into the region. The method further comprises forming a hydrogen barrier layer overlying the region, wherein the hydrogen barrier layer prevents substantial migration of hydrogen made available due to the subsequent device processing into the underlying region. The method further includes performing the subsequent device processing.
    Type: Application
    Filed: April 19, 2007
    Publication date: October 23, 2008
    Inventors: Stanley M. Filipiak, Zhi-Xiong Jiang, Mehul D. Shroff