Abstract: A heat exchange device is provided according to the present application, which includes a heat exchanger, a mounting plate, and a connecting block. The heat exchanger includes several first plates, several second plates, and an end plate and a bottom plate located at two sides of the heat exchanger. Each of the first plates and an adjacent second plate form a first flow passage or a second flow passage, the mounting plate and the end plate are fixedly mounted, and the connecting block is fixedly mounted to the bottom plate. A passage running through the heat exchanger and not in communication with the first flow passage and the second flow passage is formed in the heat exchanger, the passage has one end in communication with a communicating hole of the mounting plate, and another end in communication with a connecting channel of the connecting block.

Abstract: A method for implementing interface cache dynamic allocation is disclosed in the present invention. The method includes: setting, in advance or when a system is running, the corresponding relationship between a free cache block and an interface required to be accessed in the application, and then sending data packets inputted from the interface to the cache block; when the system is running, if the interface required to be accessed needs to be increased, revoked or modified, adjusting the corresponding relationship between the changed interface and the corresponding cache block in real time. A device and computer storage medium for implementing the method are also disclosed in the present invention.

Abstract: Hematological neoplasms resistant to treatment with an ATP-competitive inhibitor of BCR-ABL are treated by administration of N6-benzyladenosine, N6-benzyladenosine-5?-monophosphate, or pharmaceutically acceptable salts thereof.

Abstract: Prostate cancer and hematological neoplasms are treated by administration of (i) a compound of Formula I: wherein: R1 is —OH or —O—P(O)(OH)2; and R2 is (II) or (III); (ii) N6-benzyladenosine, (iii) N-(phenylmethyl)-7-?-D-ribofuranosyl-7H-pyrrolo [2,3 -d]pyrimidin-4-amine, (iv) N-(phenylmethyl)-7?-D-ribofuranosyl-7H-pyrrolo[2,3-d]pyrimidin-4-amine 5?-monophosphate; or a pharmaceutically acceptable salt thereof.

Abstract: A Quad-Data Rate (QDR) controller and an implementation method thereof are disclosed in the present invention. The controller includes: an arbiter, a control state machine, a read data sampling clock generating module, a read data path module and a read data path calibrating module. The arbiter arbitrates commands and data according to the state of the control state machine; the read data sampling clock generating module generates read data sampling clocks with the same source and same frequency and different phases; the read data path calibrating module determines, among the generated read data sampling clocks, sampling clocks of positive edge data and negative edge data for the read data path module to read data by reading training words when the control state machine is in “read data path calibrating state”; the read data path module synchronizes the positive edge read data and negative edge data in a non-system clock domain to the system clock domain according to the determined sampling clocks.

Abstract: The present invention discloses a method for scheduling queues based on a chained list.

Abstract: A Quad-Data Rate (QDR) controller and an implementation method thereof are disclosed in the present invention. The controller includes: an arbiter, used to arbitrates commands and data according to the state of the control state machine; a read data sampling clock generating module, used to generate read data sampling clocks with the same source and same frequency and different phases; a read data path calibrating module, used to determines, among the generated read data sampling clocks, sampling clocks of positive edge data and negative edge data for the read data path module to read data by reading training words when the control state machine is in “read data path calibrating state”; a read data path module, used to synchronizes the positive edge read data and negative edge data in a non-system clock domain to the system clock domain according to the determined sampling clocks.

Abstract: The present invention discloses a method for scheduling queues based on a chained list.