Patents by Inventor Zhiyong SUO

Zhiyong SUO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12381111
    Abstract: A method of wafer bonding includes: forming a first hole in a first insulation layer disposed over a first substrate; performing a first deposition-self-etch process to deposit a first conductive material in the first hole to form a first conductive plug; forming a second hole in a second insulation layer disposed over a second substrate; performing a second deposition-self-etch process to deposit a second conductive material in the second hole to form a second conductive plug; and bonding the first conductive plug with the second conductive plug to form a first grain fusion layer between the first conductive plug and the second conductive plug.
    Type: Grant
    Filed: December 14, 2021
    Date of Patent: August 5, 2025
    Assignee: Yangtze Memory Technologies Co., Ltd.
    Inventors: Chao Wang, Youdong Jiang, Yulong Zhang, Zhiyong Suo
  • Publication number: 20240404901
    Abstract: Implementations of the present disclosure disclose a package structure, a fabricating method thereof, and a memory system. The package structure includes: a packaging substrate having a first surface and a second surface opposite the first surface; a semiconductor device on the first surface of the packaging substrate and coupled with the packaging substrate; and a cap layer covering the first surface and encapsulating the semiconductor device, wherein the cap layer and the packaging substrate have a total thickness in a first direction perpendicular to the first surface, and a ratio between a distance from an upper surface of the cap layer to an upper surface of the semiconductor device in the first direction and the total thickness satisfies a first preset value.
    Type: Application
    Filed: October 20, 2023
    Publication date: December 5, 2024
    Inventors: Qi Xu, Chao Wang, Zhiyong Suo, XuHui Wang, Zhen Xu
  • Publication number: 20220189822
    Abstract: A method of wafer bonding includes: forming a first hole in a first insulation layer disposed over a first substrate; performing a first deposition-self-etch process to deposit a first conductive material in the first hole to form a first conductive plug; forming a second hole in a second insulation layer disposed over a second substrate; performing a second deposition-self-etch process to deposit a second conductive material in the second hole to form a second conductive plug; and bonding the first conductive plug with the second conductive plug to form a first grain fusion layer between the first conductive plug and the second conductive plug.
    Type: Application
    Filed: December 14, 2021
    Publication date: June 16, 2022
    Inventors: Chao WANG, Youdong JIANG, Yulong ZHANG, Zhiyong SUO