Patents by Inventor Zhiyuan Lv

Zhiyuan Lv has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11886906
    Abstract: Implementations disclosed describe a system and a method to execute a virtual machine on a processing device, receive a request to access a memory page identified by a guest virtual memory address (GVA) in an address space of the virtual machine, translate the GVA to a guest physical memory address (GPA) using a guest page table (GPT) comprising a GPT entry mapping the GVA to the GPA, translate the GPA to a host physical address (HPA) of the memory page, store, in a translation lookaside buffer (TLB), a TLB entry mapping the GVA to the HPA, modify the GPT entry to designate the memory page as accessed, detect an attempt by an application to modify the GPT entry; generate, in response to the attempt to modify the GPT entry, a page fault; and flush, in response to the page fault, the TLB entry.
    Type: Grant
    Filed: June 9, 2021
    Date of Patent: January 30, 2024
    Assignee: Intel Corporation
    Inventors: Chuanxiao Dong, Yaozu Dong, Zhiyuan Lv, Zhi Wang
  • Patent number: 11386519
    Abstract: Systems and methods for container access to graphics processing unit (GPU) resources are disclosed herein. In some embodiments, a computing system may include a physical GPU and kernel-mode driver circuitry, to communicatively couple with the physical GPU to create a plurality of emulated GPUs and a corresponding plurality of device nodes. Each device node may be associated with a single corresponding user-side container to enable communication between the user-side container and the corresponding emulated GPU. Other embodiments may be disclosed and/or claimed.
    Type: Grant
    Filed: February 14, 2020
    Date of Patent: July 12, 2022
    Assignee: Intel Corporation
    Inventors: Kun Tian, Yao Zu Dong, Zhiyuan Lv
  • Patent number: 11281500
    Abstract: An apparatus and method are described for intelligent cloud based testing of graphics hardware and software. For example, one embodiment of an apparatus comprises: a hardware pool comprising a plurality of test machines to perform cloud-based graphics validation operations; a virtual resource pool comprising data associated a plurality of different graphics hardware resources; a resource manager to coordinate between the hardware pool and the virtual resource pool to cause one or more virtual machines (VMs) to be executed on one or more of the test machines using resources from the virtual resource pool; and a task dispatcher to dispatch graphics validation tasks to the VMs responsive to user input.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: March 22, 2022
    Assignee: Intel Corporation
    Inventors: Jiajun Xu, Kun Tian, Zhiyuan Lv, Xiaowei Wang
  • Publication number: 20210294636
    Abstract: Implementations disclosed describe a system and a method to execute a virtual machine on a processing device, receive a request to access a memory page identified by a guest virtual memory address (GVA) in an address space of the virtual machine, translate the GVA to a guest physical memory address (GPA) using a guest page table (GPT) comprising a GPT entry mapping the GVA to the GPA, translate the GPA to a host physical address (HPA) of the memory page, store, in a translation lookaside buffer (TLB), a TLB entry mapping the GVA to the HPA, modify the GPT entry to designate the memory page as accessed, detect an attempt by an application to modify the GPT entry; generate, in response to the attempt to modify the GPT entry, a page fault; and flush, in response to the page fault, the TLB entry.
    Type: Application
    Filed: June 9, 2021
    Publication date: September 23, 2021
    Applicant: Intel Corporation
    Inventors: Chuanxiao Dong, Yaozu Dong, Zhiyuan LV, Zhi Wang
  • Patent number: 11048542
    Abstract: Implementations disclosed describe a system and a method to execute a virtual machine on a processing device, receive a request to access a memory page identified by a guest virtual memory address (GVA) in an address space of the virtual machine, translate the GVA to a guest physical memory address (GPA) using a guest page table (GPT) comprising a GPT entry mapping the GVA to the GPA, translate the GPA to a host physical address (HPA) of the memory page, store, in a translation lookaside buffer (TLB), a TLB entry mapping the GVA to the HPA, modify the GPT entry to designate the memory page as accessed, detect an attempt by an application to modify the GPT entry; generate, in response to the attempt to modify the GPT entry, a page fault; and flush, in response to the page fault, the TLB entry.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: June 29, 2021
    Assignee: Intel Corporation
    Inventors: Chuanxiao Dong, Yaozu Dong, Zhiyuan Lv, Zhi Wang
  • Patent number: 10970129
    Abstract: Technologies for scheduling workload submissions for a graphics processing unit (GPU) in a virtualization environment include a GPU scheduler embodied in a computing device. The virtualization environment includes a number of different virtual machines that are configured with a native graphics driver. The GPU scheduler receives GPU commands from the different virtual machines, dynamically selects a scheduling policy, and schedules the GPU commands for processing by the GPU.
    Type: Grant
    Filed: October 10, 2018
    Date of Patent: April 6, 2021
    Assignee: Intel Corporation
    Inventors: Kun Tian, Zhiyuan Lv, Yao Zu Dong
  • Publication number: 20200097313
    Abstract: Implementations disclosed describe a system and a method to execute a virtual machine on a processing device, receive a request to access a memory page identified by a guest virtual memory address (GVA) in an address space of the virtual machine, translate the GVA to a guest physical memory address (GPA) using a guest page table (GPT) comprising a GPT entry mapping the GVA to the GPA, translate the GPA to a host physical address (HPA) of the memory page, store, in a translation lookaside buffer (TLB), a TLB entry mapping the GVA to the HPA, modify the GPT entry to designate the memory page as accessed, detect an attempt by an application to modify the GPT entry; generate, in response to the attempt to modify the GPT entry, a page fault; and flush, in response to the page fault, the TLB entry.
    Type: Application
    Filed: February 22, 2019
    Publication date: March 26, 2020
    Inventors: Chuanxiao Dong, Yaozu Dong, Zhiyuan Lv, Zhi Wang
  • Patent number: 10580105
    Abstract: Systems and methods for container access to graphics processing unit (GPU) resources are disclosed herein. In some embodiments, a computing system may include a physical GPU and kernel-mode driver circuitry, to communicatively couple with the physical GPU to create a plurality of emulated GPUs and a corresponding plurality of device nodes. Each device node may be associated with a single corresponding user-side container to enable communication between the user-side container and the corresponding emulated GPU. Other embodiments may be disclosed and/or claimed.
    Type: Grant
    Filed: May 29, 2015
    Date of Patent: March 3, 2020
    Assignee: Intel Corporation
    Inventors: Kun Tian, Yao Zu Dong, Zhiyuan Lv
  • Patent number: 10482567
    Abstract: An apparatus and method are described for intelligent resource provisioning for shadow structures. For example, one embodiment of an apparatus comprises: graphics processing unit (GPU) to process graphics commands and responsively render a plurality of image frames in a graphics memory address space; shadow structure management logic to reserve one or more shadow slots in the graphics memory address space in which to store shadow instances of different GPU contexts; and the shadow structure management logic to implement a partial shadowing policy for shadowing GPU contexts in the shadow slots, the partial shadowing policy based on characteristics of pages of the GPU contexts.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: November 19, 2019
    Assignee: Intel Corporation
    Inventors: Zhiyuan Lv, Kun Tian
  • Publication number: 20190286479
    Abstract: Technologies for scheduling workload submissions for a graphics processing unit (GPU) in a virtualization environment include a GPU scheduler embodied in a computing device. The virtualization environment includes a number of different virtual machines that are configured with a native graphics driver. The GPU scheduler receives GPU commands from the different virtual machines, dynamically selects a scheduling policy, and schedules the GPU commands for processing by the GPU.
    Type: Application
    Filed: October 10, 2018
    Publication date: September 19, 2019
    Inventors: Kun Tian, Zhiyuan Lv, Yao Zu Dong
  • Patent number: 10324748
    Abstract: Apparatuses, methods and storage medium associated with live migration of virtual machines (VMs) from/to host computers with graphics virtualization are disclosed herein. In embodiments, an apparatus may include a virtual machine monitor (VMM) having a memory manager to manage accesses of system memory of the apparatus, including tracking of modified memory pages of the system memory. Additionally, the VMM may include a graphics command parser to analyze graphics commands issued to a graphics processor (GPU) of the apparatus to detect writes to the system memory caused by the graphics commands, and augment the tracking of modified memory pages. Further, the VMM may include a live migration function to live migrate a VM to another apparatus, including provision of current memory content of the VM, utilizing modified memory pages tracked by the memory manager, as augmented by the graphics command parser.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: June 18, 2019
    Assignee: Intel Corporation
    Inventors: Yao Zu Dong, Zhiyuan Lv
  • Publication number: 20180373570
    Abstract: An apparatus and method are described for intelligent cloud based testing of graphics hardware and software. For example, one embodiment of an apparatus comprises: a hardware pool comprising a plurality of test machines to perform cloud-based graphics validation operations; a virtual resource pool comprising data associated a plurality of different graphics hardware resources; a resource manager to coordinate between the hardware pool and the virtual resource pool to cause one or more virtual machines (VMs) to be executed on one or more of the test machines using resources from the virtual resource pool; and a task dispatcher to dispatch graphics validation tasks to the VMs responsive to user input.
    Type: Application
    Filed: December 22, 2015
    Publication date: December 27, 2018
    Inventors: Jiajun XU, Kun TIAN, Zhiyuan LV, Xiaowei WANG
  • Publication number: 20180374188
    Abstract: An apparatus and method are described for intelligent resource provisioning for shadow structures. For example, one embodiment of an apparatus comprises: graphics processing unit (GPU) to process graphics commands and responsively render a plurality of image frames in a graphics memory address space; shadow structure management logic to reserve one or more shadow slots in the graphics memory address space in which to store shadow instances of different GPU contexts; and the shadow structure management logic to implement a partial shadowing policy for shadowing GPU contexts in the shadow slots, the partial shadowing policy based on characteristics of pages of the GPU contexts.
    Type: Application
    Filed: December 22, 2015
    Publication date: December 27, 2018
    Inventors: Zhiyuan LV, Kun TIAN
  • Patent number: 10133597
    Abstract: Technologies for scheduling workload submissions for a graphics processing unit (GPU) in a virtualization environment include a GPU scheduler embodied in a computing device. The virtualization environment includes a number of different virtual machines that are configured with a native graphics driver. The GPU scheduler receives GPU commands from the different virtual machines, dynamically selects a scheduling policy, and schedules the GPU commands for processing by the GPU.
    Type: Grant
    Filed: June 26, 2014
    Date of Patent: November 20, 2018
    Assignee: Intel Corporation
    Inventors: Kun Tian, Zhiyuan Lv, Yao Zu Dong
  • Publication number: 20180293700
    Abstract: Systems and methods for container access to graphics processing unit (GPU) resources are disclosed herein. In some embodiments, a computing system may include a physical GPU and kernel-mode driver circuitry, to communicatively couple with the physical GPU to create a plurality of emulated GPUs and a corresponding plurality of device nodes. Each device node may be associated with a single corresponding user-side container to enable communication between the user-side container and the corresponding emulated GPU. Other embodiments may be disclosed and/or claimed.
    Type: Application
    Filed: May 29, 2015
    Publication date: October 11, 2018
    Inventors: Kun TIAN, Yao Zu DONG, Zhiyuan LV
  • Publication number: 20180024855
    Abstract: Apparatuses, methods and storage medium associated with live migration of VMs from/to host computers with graphics virtualization are disclosed herein. In embodiments, an apparatus may include a VMM having a memory manager to manage accesses of system memory of the apparatus, including tracking of modified memory pages of the system memory. Additionally, the VMM may include a graphics command parser to analyze graphics commands issued to a GPU of the apparatus to detect writes to the system memory caused by the graphics commands, and augment the tracking of modified memory pages. Further, the VMM may include a live migration function to live migrate a VM to another apparatus, including provision of current memory content of the VM, utilizing modified memory pages tracked by the memory manager, as augmented by the graphics command parser. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: June 26, 2017
    Publication date: January 25, 2018
    Inventors: Yao Zu DONG, Zhiyuan LV
  • Patent number: 9690615
    Abstract: Apparatuses, methods and storage medium associated with live migration of virtual machines (VMs) from/to host computers with graphics virtualization are disclosed herein. In embodiments, an apparatus may include a virtual machine monitor (VMM) having a memory manager to manage accesses of system memory of the apparatus, including tracking of modified memory pages of the system memory. Additionally, the VMM may include a graphics command parser to analyze graphics commands issued to a graphics processor (GPU) of the apparatus to detect writes to the system memory caused by the graphics commands, and augment the tracking of modified memory pages. Further, the VMM may include a live migration function to live migrate a VM to another apparatus, including provision of current memory content of the VM, utilizing modified memory pages tracked by the memory manager, as augmented by the graphics command parser.
    Type: Grant
    Filed: November 12, 2014
    Date of Patent: June 27, 2017
    Assignee: Intel Corporation
    Inventors: Yao Zu Dong, Zhiyuan Lv
  • Publication number: 20170123849
    Abstract: Technologies for scheduling workload submissions for a graphics processing unit (GPU) in a virtualization environment include a GPU scheduler embodied in a computing device. The virtualization environment includes a number of different virtual machines that are configured with a native graphics driver. The GPU scheduler receives GPU commands from the different virtual machines, dynamically selects a scheduling policy, and schedules the GPU commands for processing by the GPU.
    Type: Application
    Filed: June 26, 2014
    Publication date: May 4, 2017
    Inventors: Kun TIAN, Zhiyuan LV, Yao Zu DONG
  • Publication number: 20160299773
    Abstract: Apparatuses, methods and storage medium associated with live migration of VMs from/to host computers with graphics virtualization are disclosed herein. In embodiments, an apparatus may include a VMM having a memory manager to manage accesses of system memory of the apparatus, including tracking of modified memory pages of the system memory. Additionally, the VMM may include a graphics command parser to analyze graphics commands issued to a GPU of the apparatus to detect writes to the system memory caused by the graphics commands, and augment the tracking of modified memory pages. Further, the VMM may include a live migration function to live migrate a VM to another apparatus, including provision of current memory content of the VM, utilizing modified memory pages tracked by the memory manager, as augmented by the graphics command parser. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: November 12, 2014
    Publication date: October 13, 2016
    Inventors: Yao Zu DONG, Zhiyuan LV
  • Patent number: 8769513
    Abstract: An embodiment of the present invention is a technique to hide latency in program traces. Blocks of instructions between start and end of a critical section are associated with color information. The blocks correspond to a program trace and containing a wait instruction. The wait instruction is sunk down the blocks globally to the end of the critical section using the color information and a dependence constraint on the wait instruction.
    Type: Grant
    Filed: November 18, 2005
    Date of Patent: July 1, 2014
    Assignee: Intel Corporation
    Inventors: Xiaofeng Guo, Jinquan Dai, Long Li, Zhiyuan Lv