Abstract: A method of making a semiconductor device includes manufacturing a first transistor over a first side of a substrate. The method further includes depositing a spacer material against a sidewall of the first transistor. The method further includes recessing the spacer material to expose a first portion of the sidewall of the first transistor. The method further includes manufacturing a first electrical connection to the transistor, a first portion of the electrical connection contacts a surface of the first transistor farthest from the substrate, and a second portion of the electrical connect contacts the first portion of the sidewall of the first transistor. The method further includes manufacturing a self-aligned interconnect structure (SIS) extending along the spacer material, wherein the spacer material separates a portion of the SIS from the first transistor, and the first electrical connection directly contacts the SIS.

Abstract: The present invention is directed to cyclobutyl pyrazolopyrimidine compounds which may be useful as therapeutic agents for the treatment of disorders associated with phosphodiesterase 9 (PDE9). The present invention also relates to the use of such compounds for treating cardiovascular and cerebrovascular diseases, such as hypertension, chronic kidney disease and heart failure, and neurological and psychiatric disorders, such as schizophrenia, psychosis or Huntington's disease, and those associated with striatal hypofunction or basal ganglia dysfunction.

Abstract: A method includes forming a first transistor stack over a substrate. The first transistor stack includes: a first transistor of a first conductivity type, and a second transistor of a second conductivity type different from the first conductivity type. The second transistor is above the first transistor. A plurality of first conductive lines is formed in a first metal layer above the first transistor stack. The plurality of first conductive lines includes, over the first transistor stack, a power conductive line configured to route power to the first transistor stack, one or more signal conductive lines configured to route one or more signals to the first transistor stack, and a shielding conductive line configured to shield the routed one or more signals. The one or more signal conductive lines are between the power conductive line and the shielding conductive line.

Abstract: A device includes a plurality of tracks, wherein at least one of the plurality of tracks comprises a first power rail for a first voltage. The device further includes a first via in electrical contact with the power rail. The device further includes a first contact in electrical contact with the first via. The device further includes a first transistor in electrical contact with the first contact. The device further includes a second transistor in electrical isolation with the first transistor. The device further includes a second contact in electrical contact with the second transistor. The device further includes a second via in electrical contact with the second contact. The device further includes a second power rail in electrical contact with the second via, wherein the second power rail is configured to carry a second voltage.

Abstract: Apparatuses and methods for pipelining memory operations with error correction coding are disclosed. A method for pipelining consecutive write mask operations is disclosed wherein a second read operation of a second write mask operation occurs during error correction code calculation of a first write mask operation. The method may further including writing data from the first write mask operation during the error correction code calculation of the second write mask operation. A method for pipelining consecutive operations is disclosed where a first read operation may be cancelled if the first operation is not a write mask operation. An apparatus including a memory having separate global read and write input-output lines is disclosed.

Abstract: Apparatuses and methods for pipelining memory operations with error correction coding are disclosed. A method for pipelining consecutive write mask operations is disclosed wherein a second read operation of a second write mask operation occurs during error correction code calculation of a first write mask operation. The method may further including writing data from the first write mask operation during the error correction code calculation of the second write mask operation. A method for pipelining consecutive operations is disclosed where a first read operation may be cancelled if the first operation is not a write mask operation. An apparatus including a memory having separate global read and write input-output lines is disclosed.

Abstract: Apparatuses and methods for pipelining memory operations with error correction coding are disclosed. A method for pipelining consecutive write mask operations is disclosed wherein a second read operation of a second write mask operation occurs during error correction code calculation of a first write mask operation. The method may further including writing data from the first write mask operation during the error correction code calculation of the second write mask operation. A method for pipelining consecutive operations is disclosed where a first read operation may be cancelled if the first operation is not a write mask operation. An apparatus including a memory having separate global read and write input-output lines is disclosed.

Abstract: Apparatuses and methods for pipelining memory operations with error correction coding are disclosed. A method for pipelining consecutive write mask operations is disclosed wherein a second read operation of a second write mask operation occurs during error correction code calculation of a first write mask operation. The method may further including writing data from the first write mask operation during the error correction code calculation of the second write mask operation. A method for pipelining consecutive operations is disclosed where a first read operation may be cancelled if the first operation is not a write mask operation. An apparatus including a memory having separate global read and write input-output lines is disclosed.

Abstract: The present invention is directed to cyclobutyl pyrazolopyrimidine compounds which may be useful as therapeutic agents for the treatment of disorders associated with phosphodiesterase 9 (PDE9). The present invention also relates to the use of such compounds for treating cardiovascular and cerebrovascular diseases, such as hypertension, chronic kidney disease and heart failure, and neurological and psychiatric disorders, such as schizophrenia, psychosis or Huntington's disease, and those associated with striatal hypofunction or basal ganglia dysfunction.

Abstract: The present invention is directed to pyrazolopyrimidine compounds of the general structural formula I: which may be useful as therapeutic agents for the treatment of disorders associated with phosphodiesterase 9 (PDE9). The present invention also relates to the use of such compounds for treating cardiovascular and cerebrovascular diseases, such as hypertension, chronic kidney disease and heart failure, and neurological and psychiatric disorders, such as schizophrenia, psychosis or Huntington's disease, and those associated with striatal hypofunction or basal ganglia dysfunction.

Abstract: The present invention relates to a compound represented by formula (I): and pharmaceutically acceptable salts thereof are disclosed as useful for treating or preventing diabetes, hyperlipidemia, obesity, NASH, inflammation related disorders, and related diseases and conditions. The compounds are useful as agonists of the G-protein coupled receptor GPR120. Pharmaceutical compositions and methods of treatment are also included.

Abstract: The present invention is directed to pyrazolopyrimidine compounds of the general structural formula I: which may be useful as therapeutic agents for the treatment of disorders associated with phosphodiesterase 9 (PDE9). The present invention also relates to the use of such compounds for treating cardiovascular and cerebrovascular diseases, such as hypertension, chronic kidney disease and heart failure, and neurological and psychiatric disorders, such as schizophrenia, psychosis or Huntington's disease, and those associated with striatal hypofunction or basal ganglia dysfunction.

Abstract: Apparatuses and methods for pipelining memory operations with error correction coding are disclosed. A method for pipelining consecutive write mask operations is disclosed wherein a second read operation of a second write mask operation occurs during error correction code calculation of a first write mask operation. The method may further including writing data from the first write mask operation during the error correction code calculation of the second write mask operation. A method for pipelining consecutive operations is disclosed where a first read operation may be cancelled if the first operation is not a write mask operation. An apparatus including a memory having separate global read and write input-output lines is disclosed.

Abstract: Apparatuses and methods for pipelining memory operations with error correction coding are disclosed. A method for pipelining consecutive write mask operations is disclosed wherein a second read operation of a second write mask operation occurs during error correction code calculation of a first write mask operation. The method may further including writing data from the first write mask operation during the error correction code calculation of the second write mask operation. A method for pipelining consecutive operations is disclosed where a first read operation may be cancelled if the first operation is not a write mask operation. An apparatus including a memory having separate global read and write input-output lines is disclosed.

Abstract: The present invention relates to a compound represented by formula (I): and pharmaceutically acceptable salts thereof are disclosed as useful for treating or preventing diabetes, hyperlipidemia, obesity, NASH, inflammation related disorders, and related diseases and conditions. The compounds are useful as agonists of the G-protein coupled receptor GPR120. Pharmaceutical compositions and methods of treatment are also included.

Abstract: The present invention is directed to pyrazolopyrimidine compounds which may be useful as therapeutic agents for the treatment of disorders associated with phosphodiesterase 9 (PDE9). The present invention also relates to the use of such compounds for treating cardiovascular and cerebrovascular diseases, such as hypertension, chronic kidney disease and heart failure, and neurological and psychiatric disorders, such as schizophrenia, psychosis or Huntington's disease, and those associated with striatal hypofunction or basal ganglia dysfunction.

Abstract: The present invention relates to compounds of formula I that are useful as hepatitis C virus (HCV) NS5B polymerase inhibitors, the synthesis of such compounds, and the use of such compounds for inhibiting HCV NS5B polymerase activity, for treating or preventing HCV infections and for inhibiting HCV viral replication and/or viral production in a cell-based system.

Abstract: The present invention relates to compounds of formula (I) that are useful as hepatitis C virus (HCV) NS5B polymerase inhibitors, the synthesis of such compounds, and the use of such compounds for inhibiting HCV NS5B polymerase activity, for treating or preventing HCV infections and for inhibiting HCV viral replication and/or viral production in a cell-based system.

Abstract: The present invention relates to compounds of formula I that are useful as hepatitis C virus (HCV) NS5B polymerase inhibitors, the synthesis of such compounds, and the use of such compounds for inhibiting HCV NS5B polymerase activity, for treating or preventing HCV infections and for inhibiting HCV viral replication and/or viral production in a cell-based system.

Abstract: Apparatuses and methods for pipelining memory operations with error correction coding are disclosed. A method for pipelining consecutive write mask operations is disclosed wherein a second read operation of a second write mask operation occurs during error correction code calculation of a first write mask operation. The method may further including writing data from the first write mask operation during the error correction code calculation of the second write mask operation. A method for pipelining consecutive operations is disclosed where a first read operation may be cancelled if the first operation is not a write mask operation. An apparatus including a memory having separate global read and write input-output lines is disclosed.