Patents by Inventor Zhonghao CUI

Zhonghao CUI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Data reading/writing method and system in 3D image processing, storage medium and terminal
    Patent number: 11455781
    Abstract: The present disclosure provides a data reading/writing method and system for in 3D image processing, a storage medium and a terminal. The method includes the following steps: dividing a 3D image horizontally based on the vertical sliding technology, the 3D image is divided into at least two subimages, a processing data of each subimage is stored in a circular buffer, after the subimage is processed, an overlapping portion data required by next subimage is retained in the circular buffer; dividing a multi-layer network of an image processing algorithm into at least two segments, the data between adjacent layers in each segment only interact through buffer, not through DDR.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: September 27, 2022
    Assignees: VeriSilicon Microelectronics (Shanghai) Co., Ltd., VeriSilicon Holdings Co., Ltd., VeriSilicon Microelectronics (Nanjing) Co., Ltd.
    Inventors: Zhonghao Cui, Mankit Lo, Ke Zhang, Huiming Zhang
  • DATA READING/WRITING METHOD AND SYSTEM IN 3D IMAGE PROCESSING, STORAGE MEDIUM AND TERMINAL
    Publication number: 20210295607
    Abstract: The present disclosure provides a data reading/writing method and system for in 3D image processing, a storage medium and a terminal. The method includes the following steps: dividing a 3D image horizontally based on the vertical sliding technology, the 3D image is divided into at least two subimages, a processing data of each subimage is stored in a circular buffer, after the subimage is processed, an overlapping portion data required by next subimage is retained in the circular buffer; dividing a multi-layer network of an image processing algorithm into at least two segments, the data between adjacent layers in each segment only interact through buffer, not through DDR.
    Type: Application
    Filed: September 25, 2019
    Publication date: September 23, 2021
    Applicants: VeriSilicon Microelectronics (Shanghai) Co., Ltd., VeriSilicon Holdings Co., Ltd., VeriSilicon Microelectronics (Nanjing) Co., Ltd.
    Inventors: Zhonghao CUI, Mankit LO, Ke ZHANG, Huiming ZHANG