Patents by Inventor ZHONGHUA QIAN
ZHONGHUA QIAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11965061Abstract: A ternary composite catalyst of diethylzinc and yttrium trifluoroacetate loaded on chitin for copolymerization of carbon dioxide, epoxy cyclohexane and ethylene oxide is provided. The ternary composite catalyst exhibits strong catalytic activity for the ternary copolymerization of carbon dioxide, cyclohexane oxide and ethylene oxide. A high molecular weight and content of ester chain is maintained. Conventional rare earth ternary catalysts leave residues in the polymer, and the polymer requires rinsing with hydrochloric acid. The ternary composite catalyst can be removed through filtration. The average molecular weight of the resulting polycarbonate is more than 100,000, and the ester chain content is more than 90%. The resulting polymer has a lower metal content. The ternary composite catalyst can be used in agricultural film, disposable packaging and other polymer materials.Type: GrantFiled: July 28, 2022Date of Patent: April 23, 2024Assignee: Changzhou UniversityInventors: Qun Chen, Mingyang He, Junfeng Qian, Shengchun Chen, Zhonghua Sun, Weiyou Zhou, Zenan Ji
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Patent number: 11901327Abstract: A semiconductor device includes an integrated circuit die having bond pads and a bond wires. The bond wires are connected to respective ones of the bond pads by a ball bond. An area of contact between the ball bond and the bond pad has a predetermined shape that is non-circular and includes at least one axis of symmetry. A ratio of the ball bond length to the ball bond width may be equal to a ratio of the bond pad length to the bond pad width.Type: GrantFiled: February 26, 2021Date of Patent: February 13, 2024Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: Yang Lei, Xiaofeng Di, Yuyun Lou, Zhonghua Qian, Junrong Yan
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Patent number: 11894343Abstract: A semiconductor device is vertically mounted on a medium such as a printed circuit board (PCB). The semiconductor device comprises a block of semiconductor dies, mounted in a vertical stack without offset. Once formed and encapsulated, side grooves may be formed in the device exposing electrical conductors of each die within the device. The electrical conductors exposed in the grooves mount to electrical contacts on the medium to electrically couple the semiconductor device to the medium.Type: GrantFiled: May 24, 2021Date of Patent: February 6, 2024Assignee: Western Digital Technologies, Inc.Inventors: Xianlu Cui, Junrong Yan, Wei Liu, Zhonghua Qian
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Publication number: 20230411169Abstract: A method includes the step of thinning a semiconductor wafer by a horizontal stealth lasing process, and semiconductor wafers, dies and devices formed thereby. After formation of an integrated circuit layer on a semiconductor wafer, the wafer may be thinned by supporting an active surface of the wafer on a rotating chuck, and focusing a horizontally-oriented laser in multiple cycles at different radii within the rotating wafer. Upon completion of the multiple cycles, a portion of the wafer substrate may be removed, leaving the wafer thinned to its final thickness. Thereafter, a vertical stealth lasing process may be performed to cut individual semicondcutor dies from the thinned wafer.Type: ApplicationFiled: June 15, 2022Publication date: December 21, 2023Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: Yi Wu, Junrong Yan, Zhonghua Qian, Keming Zhou, Kailei Zhang
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Publication number: 20230402323Abstract: A semiconductor die is separated from a semiconductor wafer using a method that involves performing a partial cut on the semiconductor wafer, applying tape lamination to a front side of the semiconductor wafer, grinding a back side of the semiconductor wafer, mounting the semiconductor wafer to a die attach film (DAF) layer, removing the tape lamination from the front side of the semiconductor wafer, and performing a DAF-die separation operation to separate the semiconductor die from the adjacent semiconductor die. A DAF laser is not used during the method of separating a semiconductor die from a semiconductor wafer. The front side is the side of the semiconductor wafer where integrated circuits are exposed. The partial cut is between the semiconductor die and an adjacent semiconductor die. The back side is opposite of the front side and the back side is a silicon layer of the semiconductor die.Type: ApplicationFiled: June 13, 2022Publication date: December 14, 2023Applicant: Western Digital Technologies, Inc.Inventors: Zhengjie ZHU, Junrong YAN, Chee Keong CHIN, Cheng CHANG, Zhonghua QIAN
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Patent number: 11756932Abstract: A semiconductor device package includes a mechanical support structure that provides mechanical support to a stack of dies, where the dies are laterally offset from each other. The support structure has a sloped surface that is disposed at a non-perpendicular and non-parallel angle to other surfaces of the mechanical support structure. Electrical contacts are disposed on the sloped surface of the mechanical support structure for electrically interfacing with the stacked dies and on a different surface of the mechanical support structure for electrically interfacing with a substrate.Type: GrantFiled: November 30, 2020Date of Patent: September 12, 2023Assignee: SANDISK TECHNOLOGIES LLCInventors: Xianlu Cui, Junrong Yan, Cheekeong Chin, Zhonghua Qian
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Publication number: 20220375899Abstract: A semiconductor device is vertically mounted on a medium such as a printed circuit board (PCB). The semiconductor device comprises a block of semiconductor dies, mounted in a vertical stack without offset. Once formed and encapsulated, side grooves may be formed in the device exposing electrical conductors of each die within the device. The electrical conductors exposed in the grooves mount to electrical contacts on the medium to electrically couple the semiconductor device to the medium.Type: ApplicationFiled: May 24, 2021Publication date: November 24, 2022Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: Xianlu Cui, Junrong Yan, Wei Liu, Zhonghua Qian
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Publication number: 20220052014Abstract: A semiconductor device includes an integrated circuit die having bond pads and a bond wires. The bond wires are connected to respective ones of the bond pads by a ball bond. An area of contact between the ball bond and the bond pad has a predetermined shape that is non-circular and includes at least one axis of symmetry. A ratio of the ball bond length to the ball bond width may be equal to a ratio of the bond pad length to the bond pad width.Type: ApplicationFiled: February 26, 2021Publication date: February 17, 2022Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: Yang Lei, Xiaofeng Di, Yuyun Lou, Zhonghua Qian, Junrong Yan
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Publication number: 20210407967Abstract: A semiconductor device package includes a mechanical support structure that provides mechanical support to a stack of dies, where the dies are laterally offset from each other. The support structure has a sloped surface that is disposed at a non-perpendicular and non-parallel angle to other surfaces of the mechanical support structure. Electrical contacts are disposed on the sloped surface of the mechanical support structure for electrically interfacing with the stacked dies and on a different surface of the mechanical support structure for electrically interfacing with a substrate.Type: ApplicationFiled: November 30, 2020Publication date: December 30, 2021Applicant: Western Digital Technologies, Inc.Inventors: XIANLU CUI, JUNRONG YAN, CHEEKEONG CHIN, ZHONGHUA QIAN