Abstract: The present invention relates to an alloy with formula of RE-M-B—Fe as defined herein and oxygen content less than 0.9 wt %, wherein said RE is in the range of 29.0 weight % to 33.0 weight %; M is in the range of 0.25 weight % to 1.0 weight %; B is in the range of 0.8 weight % to 1.1 weight %; and Fe makes up the balance.

Abstract: A prefetcher, an operating method of the prefetcher, and a processor including the prefetcher are provided. The prefetcher includes a prefetch address generating circuit, an address tracking circuit, and an offset control circuit. The prefetch address generating circuit generates a prefetch address based on first prefetch information and an offset amount. The address tracking circuit stores the prefetch address and a plurality of historical prefetch addresses. When receiving an access address, the offset control circuit updates the offset amount based on second prefetch information, the access address, the prefetch address, and the historical prefetch addresses, and provides the prefetch address generating circuit with the updated offset amount.

Abstract: The disclosure provides a data prefetching auxiliary circuit, a data prefetching method, and a microprocessor. The data prefetching auxiliary circuit includes a stride calculating circuit, a comparing module, a stride selecting module, and a prefetching output module. The stride calculating circuit receives an access address to calculate and provide a stride. The comparing module receives the access address and the stride, generates a reference address based on a first multiple, the access address and the stride, determines whether the reference address matches any of a plurality of history access addresses, and generates and outputs a hit indicating bit value. The stride selecting module receives the hit indicating bit value, and determines whether to output the hit indicating bit value based on a prefetch enabling bit value. The prefetching output module determines a prefetch address according to the output of the stride selecting module.

Abstract: The present disclosure provides a cache system and an operating method thereof. The system includes an upper-level cache unit and a last level cache (LLC). The LLC includes a directory, a plurality of counters, and a register. The directory includes a status indicator recording a utilization status of the upper-level cache unit to the LLC. The counters are used to increase or decrease a counting value according to a variation of the status indicator, record an access number from the upper-level cache unit, and record a hit number of the upper-level cache unit accessing the LLC. According to the counting value, the access number, and the hit number, the first parameters of the register are controlled, so as to adjust a utilization strategy to the LLC.

Abstract: The present disclosure provides a cache system and an operating method thereof. The system includes an upper-level cache unit and a last level cache (LLC). The LLC includes a directory, a plurality of counters, and a register. The directory includes a status indicator recording a utilization status of the upper-level cache unit to the LLC. The counters are used to increase or decrease a counting value according to a variation of the status indicator, record an access number from the upper-level cache unit, and record a hit number of the upper-level cache unit accessing the LLC. According to the counting value, the access number, and the hit number, the first parameters of the register are controlled, so as to adjust a utilization strategy to the LLC.

Abstract: A prefetcher, an operating method of the prefetcher, and a processor including the prefetcher are provided. The prefetcher includes a prefetch address generating circuit, an address tracking circuit, and an offset control circuit. The prefetch address generating circuit generates a prefetch address based on first prefetch information and an offset amount. The address tracking circuit stores the prefetch address and a plurality of historical prefetch addresses. When receiving an access address, the offset control circuit updates the offset amount based on second prefetch information, the access address, the prefetch address, and the historical prefetch addresses, and provides the prefetch address generating circuit with the updated offset amount.

Abstract: The present invention relates to an alloy with composition of RE-Fe-M-B as defined herein, wherein said alloy comprises at least 80 vol % RE2Fe14B phase, the average crystal grain size of the RE2Fe14B phase is in the range of about 20 nm to about 40 nm, and the alloy is an alloy ribbon having a width measured from a left edge to a center portion to a right edge, and the average crystal RE2Fe14B grain size difference between the center portion, and left and right edges of said alloy ribbon is less than 20%. The present invention also relates to a method for preparing an alloy ribbon with composition of RE-Fe-M-B as defined herein comprising the steps of: (i) ejecting a melt of the alloy with composition of RE-Fe-M-B onto a rotating wheel at a mass flow rate of about 0.2 kg/min to about 1.

Abstract: The disclosure provides a data prefetching auxiliary circuit, a data prefetching method, and a microprocessor. The data prefetching auxiliary circuit includes a stride calculating circuit, a comparing module, a stride selecting module, and a prefetching output module. The stride calculating circuit receives an access address to calculate and provide a stride. The comparing module receives the access address and the stride, generates a reference address based on a first multiple, the access address and the stride, determines whether the reference address matches any of a plurality of history access addresses, and generates and outputs a hit indicating bit value. The stride selecting module receives the hit indicating bit value, and determines whether to output the hit indicating bit value based on a prefetch enabling bit value. The prefetching output module determines a prefetch address according to the output of the stride selecting module.

Abstract: An optimized communication technique is provided. A transaction capability table records a first value representing practical transaction capability of a source module for transmitting a communication transaction to a destination module. Exchange of transaction capability regarding the destination module between the source module and at least one neighboring source module is taken into account in the first value. The source control logic circuit manages the transaction capability table and controls the source module to transmit a communication transaction to the destination module based on the first value recorded in the transaction capability table.

Abstract: An optimized communication technique is provided. A communication controller has a retransmission list and a destination control logic circuit. The retransmission list records an identification number of a communication transaction that failed to transmit from a source module to a destination module. The destination control logic circuit manages the retransmission list. When a tracker is released from a queue of the destination module, the destination control logic circuit requests the source module to retransmit the communication transaction to the destination module according to the identification number recorded in the retransmission list.

Abstract: A cache memory is shared by N cores of a processor. The cache memory includes a unified tag part and a sliced data part partitioned into N data slices. Each data slice of the N data slices is physically local to a respective one of the N cores and physically remote from the other N-1 cores. For each core, the cache memory biases allocations caused by the core towards a physically local slice of the core. The cache memory may be arranged as a set-associative cache memory, and allocations may be based on a miss rate of a data slice and a number of M ways allocated to a core. A dispatch queue dispatches requests in a schedule fashion so that only one of the N data slices at a time returns data to each core.

Abstract: A cache memory is shared by N cores of a processor. The cache memory includes a unified tag part and a sliced data part partitioned into N data slices. Each data slice of the N data slices is physically local to a respective one of the N cores and physically remote from the other N?1 cores. N is an integer greater than one. For each core of the N cores, the cache memory biases allocations caused by the core towards a physically local slice of the core. The physically local slice is one of the N data slices and is physically local to the core.

Abstract: The present invention application provides a bathtub. On the bathtub wall are fixed ultrasonic transmitters, and an ultrasonic transducer drive circuit is electrically connected to ultrasonic transducers. The ultrasonic transmitters further include an ultrasonic divergent structure which, after reflecting and scattering the ultrasonic waves emitted by the ultrasonic transducers, transmits the same into the bathtub (e.g., into the water of the tub).

Abstract: An automatic sensing system and a detecting method for use with plumbing equipment in the kitchen and washroom are shown and described. The automatic sensing system includes an ambient light sensor for detecting the ambient light intensity around the equipment. The system further includes a detecting sensor for detecting whether user enters the detected area. The system also includes a controller which controls the equipment based on detected signals from the detecting sensor. The controller is configured to start or change the state of the detecting sensor according to a detected value change of the ambient light intensity. The automatic sensing system advantageously saves power consumed by the detecting sensor when the ambient light sensor does not indicate use by the equipment.

Abstract: Systems and methods for pairing a wireless transceiver unit for sanitary ware are provided. An exemplary pairing method includes emitting a pairing instruction signal from a wireless sender of the wireless transceiver unit, receiving the emitted pairing instruction signal at one or more wireless receivers, and detecting a signal intensity of the pairing instruction signal received at each of the one or more wireless receivers. The method further includes returning a pairing response from each of the one or more wireless receivers to the wireless sender. The pairing response includes an ID of the wireless receiver and an indication of the signal intensity detected at the wireless receiver. The method further includes selecting the pairing response indicating the highest detected signal intensity and storing the ID of the wireless receiver included in the selected pairing response.

Abstract: Systems and methods for detecting a position of an object relative to a plumbing fixture are provided. A described method includes emitting a microwave detection signal toward a moving object, receiving an echo-wave signal reflected from the moving object, and superimposing the microwave detection signal and the echo-wave signal to produce a superimposed time domain signal. The method further includes performing a Fast Fourier Transformation on the time domain signal to generate a frequency domain signal, integrating the frequency domain signal, and actively adjusting a result of the integration by subtracting a predetermined amount from the result. The predetermined amount is at least one of: a volume contribution amount and an interference contribution amount. The method further includes determining a position of the moving object relative to the plumbing fixture by comparing the adjusted integration result with a distance standard curve.

Abstract: The present invention discloses a urinal with a conductivity sensor, which includes the conductivity sensor arranged at the location where a reservoir of the urinal is curved and adapted to detect urine, a control unit (MCU), a power battery, and an electromagnetic valve adapted to control a discharge of water, wherein the conductivity sensor is adapted to detect a conductivity to determine whether urine is present. After the conductivity sensor detects presence of urine, the control unit opens the electromagnetic valve. The conductivity sensor includes electrodes dipped inside the location where the reservoir is curved to contact urine. The conductivity sensor further includes an anti-polarization-of-electrode circuit based upon the principle of an alternating power supply. Thus, the sensor can achieve more reliable sensing and a longer lifetime.

Abstract: A hidden sensing device and its urinal are disclosed. The hidden sensing device, which is attached on some sanitary installations, comprises a conductivity sensor for detecting urine and a Micro-programmed Control Unit (MCU) for processing signals, wherein said conductivity sensor has electrodes extending into urine. The device further includes a microwave sensor controlled by the MCU to detect human's movements. When the conductivity sensor has detected urine, the MCU will turn on the microwave sensor to detect the human's presence or departure.

Abstract: An automatic sensing system and a detecting method for use with plumbing equipment in the kitchen and washroom are shown and described. The automatic sensing system includes an ambient light sensor for detecting the ambient light intensity around the equipment. The system further includes a detecting sensor for detecting whether user enters the detected area. The system also includes a controller which controls the equipment based on detected signals from the detecting sensor. The controller is configured to start or change the state of the detecting sensor according to a detected value change of the ambient light intensity. The automatic sensing system advantageously saves power consumed by the detecting sensor when the ambient light sensor does not indicate use by the equipment.

Abstract: There is disclosed a magnetic material having a composition in atomic percentage of: (MM1-aRa)uFe100-u-v-w-x-yYvMwTxBy wherein MM is a mischmetal or a synthetic equivalent thereof; R is Nd, Pr or a combination thereof; Y is a transition metal other than Fe; M is one or more of a metal selected from Groups 4 to 6 of the periodic table; and T is one or more of a metal other than B, selected from Groups 11 to 14 of the periodic table, wherein 0?a?1, 7?u?13, 0?v?20, 0?w?5; 0?x?5 and 4?y?12.