Patents by Inventor Zhongqian GUO

Zhongqian GUO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12048210
    Abstract: A display panel includes a substrate, a plurality of data lines, at least one circle of barrier wall structure, and a connector. The substrate includes a display area, and a peripheral area which surrounds the display area and includes a fan-out area. The plurality of data lines are located on one side of the substrate and in the display area, extending from the display area to the fan-out area. The at least one circle of barrier wall structure surrounds the display area, and at least a part of the at least one circle of barrier wall structure is located in the fan-out area. The connector is located between the plurality of data lines and the barrier wall structure, and one end, away from the substrate, of the connector extends into the barrier wall structure to fasten the barrier wall structure.
    Type: Grant
    Filed: January 25, 2021
    Date of Patent: July 23, 2024
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Zheng Bao, Gong Chen, Kangguan Pan, Yanxia Xin, Hongwei Hu, Xueping Li, Yihao Wu, Xiaoyun Wang, Yong Zhuo, Zhongqian Guo
  • Publication number: 20230171998
    Abstract: Provided are a display substrate, a testing method therefor and a preparation method therefor, and a display panel, which are used for improving the success rate of transistor testing. The display substrate comprises a base substrate and a pixel circuit, wherein the pixel circuit comprises an active layer, a first gate insulating layer, a first gate electrode layer, a second gate insulating layer, a second gate electrode layer, a first interlayer insulating layer, a source/drain electrode layer, and a second interlayer insulating layer. The pixel circuit is divided into a plurality of transistors, and further comprises a gate electrode contact hole and a source/drain electrode contact hole.
    Type: Application
    Filed: June 1, 2021
    Publication date: June 1, 2023
    Inventors: Yong ZHUO, Yanxia XIN, Hongwei HU, Zheng BAO, Xueping LI, Yihao WU, Xiaoyun WANG, Zhongqian GUO
  • Publication number: 20220320240
    Abstract: A display panel includes a substrate, a plurality of data lines, at least one circle of barrier wall structure, and a connector. The substrate includes a display area, and a peripheral area which surrounds the display area and includes a fan-out area. The plurality of data lines are located on one side of the substrate and in the display area, extending from the display area to the fan-out area. The at least one circle of barrier wall structure surrounds the display area, and at least a part of the at least one circle of barrier wall structure is located in the fan-out area. The connector is located between the plurality of data lines and the barrier wall structure, and one end, away from the substrate, of the connector extends into the barrier wall structure to fasten the barrier wall structure.
    Type: Application
    Filed: January 25, 2021
    Publication date: October 6, 2022
    Inventors: Zheng BAO, Gong CHEN, Kangguan PAN, Yanxia XIN, Hongwei HU, Xueping LI, Yihao WU, Xiaoyun WANG, Yong ZHUO, Zhongqian GUO