Abstract: This invention provides a power switch circuit and a power circuit using the power switch circuit. In particular, the power switch circuit includes a first reverse current monitoring circuit and a second reverse current monitoring circuit. The first reverse current monitoring circuit is coupled to a power transistor, and is configured to detect whether a reverse current flows through the power transistor to a voltage input terminal for a predetermined period of time, and only if yes, turn off the power transistor. The second reverse current monitoring circuit is coupled to the power transistor, and is configured to detect whether a reverse current flows through the power transistor to the voltage input terminal, and if yes, turn off the power transistor immediately.

Abstract: This invention provides a power switch circuit and a power circuit using the power switch circuit. In particular, the power switch circuit includes a first reverse current monitoring circuit and a second reverse current monitoring circuit. The first reverse current monitoring circuit is coupled to a power transistor, and is configured to detect whether a reverse current flows through the power transistor to a voltage input terminal for a predetermined period of time, and only if yes, turn off the power transistor. The second reverse current monitoring circuit is coupled to the power transistor, and is configured to detect whether a reverse current flows through the power transistor to the voltage input terminal, and if yes, turn off the power transistor immediately. As such, the reverse current can be blocked in time from further flowing to the voltage input terminal, thereby avoiding a damage to the interior electronic components of the power source at the low voltage side.

Abstract: A cable drop compensation circuit includes a current detection circuit, a compensation judgment circuit, and a compensation circuit. The current detection circuit detects a load current supplied to a load by a DC output circuit, so as to generate a current detection signal. The compensation judgment circuit receives the current detection signal, and generates a judgment signal when judging the load current higher than a predetermined compensation value. When receiving the judgment signal, the compensation circuit generates a compensation signal. In response to the compensation signal, the DC output circuit raises an output voltage by a compensation voltage.

Abstract: A power supply device is provided. The power supply device includes a power transistor, a detection circuit and a driving circuit. The power transistor is controlled by the driving circuit to generate an output current. A first end of the power transistor is coupled to a power voltage pin through a first bonding wire. A second end of the power transistor is configured to output the output current. The detection circuit is coupled between two ends of the first bonding wire to detect the output current and generate a control signal. The driving circuit generates a driving signal according to the control signal. When the output current value is larger than or equal to an over-current-protection current value, the driving circuit starts to adjust a voltage value of the driving signal, such that the output current value is kept at the over-current-protection current value.

Abstract: The invention is directed to a low-dropout voltage regulator (LDO), including a power transistor, a driving stage circuit, a feedback circuit, a bias power source and an auxiliary reference current generation circuit. The power transistor is controlled by a driving signal to convert an input voltage into an output voltage. The feedback circuit generates a feedback voltage according to the output voltage. The driving stage circuit generates the driving signal according to the feedback voltage and the reference voltage. The bias power source provides a bias current. The auxiliary reference current generation circuit is configured to sample an output current, adjust the sampled output current to generate an adjustment current by means of mapping and superpose the adjustment current onto the bias current to generate a reference current to control drive capability of the driving stage circuit.

Abstract: A buck converting controller, adapted to control a DC-DC buck converting circuit to convert an input voltage into an output voltage, is disclosed. The buck converting controller comprises a feedback control circuit, an off-time determination circuit and a load control circuit. The feedback control circuit turns on and off a high-side transistor and a low-side transistor of the DC-DC buck converting circuit in response to a feedback signal indicative of the output voltage. The off-time determination circuit determines a preset off-time period according to the input voltage and the output voltage and generates an off notice signal according to the preset off-time period. The load control circuit is coupled to the DC-DC buck converting circuit and determines whether to release an electronic energy stored in the DC-DC buck converting circuit according to the off notice signal.

Abstract: A power supply device is provided. The power supply device includes a power transistor, a detection circuit and a driving circuit. The power transistor is controlled by the driving circuit to generate an output current. A first end of the power transistor is coupled to a power voltage pin through a first bonding wire. A second end of the power transistor is configured to output the output current. The detection circuit is coupled between two ends of the first bonding wire to detect the output current and generate a control signal. The driving circuit generates a driving signal according to the control signal. When the output current value is larger than or equal to an over-current-protection current value, the driving circuit starts to adjust a voltage value of the driving signal, such that the output current value is kept at the over-current-protection current value.

Abstract: The invention is directed to a low-dropout voltage regulator (LDO), including a power transistor, a driving stage circuit, a feedback circuit, a bias power source and an auxiliary reference current generation circuit. The power transistor is controlled by a driving signal to convert an input voltage into an output voltage. The feedback circuit generates a feedback voltage according to the output voltage. The driving stage circuit generates the driving signal according to the feedback voltage and the reference voltage. The bias power source provides a bias current. The auxiliary reference current generation circuit is configured to sample an output current, adjust the sampled output current to generate an adjustment current by means of mapping and superpose the adjustment current onto the bias current to generate a reference current to control drive capability of the driving stage circuit.

Abstract: A cable drop compensation circuit includes a current detection circuit, a compensation judgment circuit, and a compensation circuit. The current detection circuit detects a load current supplied to a load by a DC output circuit, so as to generate a current detection signal. The compensation judgment circuit receives the current detection signal, and generates a judgment signal when judging the load current higher than a predetermined compensation value. When receiving the judgment signal, the compensation circuit generates a compensation signal. In response to the compensation signal, the DC output circuit raises an output voltage by a compensation voltage.

Abstract: A buck converting controller, adapted to control a DC-DC buck converting circuit to convert an input voltage into an output voltage, is disclosed. The buck converting controller comprises a feedback control circuit, an off-time determination circuit and a load control circuit. The feedback control circuit turns on and off a high-side transistor and a low-side transistor of the DC-DC buck converting circuit in response to a feedback signal indicative of the output voltage. The off-time determination circuit determines a preset off-time period according to the input voltage and the output voltage and generates an off notice signal according to the preset off-time period. The load control circuit is coupled to the DC-DC buck converting circuit and determines whether to release an electronic energy stored in the DC-DC buck converting circuit according to the off notice signal.

Abstract: A power-good signal generator generates a power-good signal according to a control signal of a controller, and comprises an impedance element, a controlled transistor and a power sequencing free circuit. An end of the impedance element is coupled to a second voltage source. The controlled transistor has first and second input/output ends and a controlled end, wherein the first input/output end is coupled to the other end of the impedance element to generate the power-good signal. An operating state of the controlled transistor is changed in response to the control signal. The power sequencing free circuit is coupled to the controlled end and one of the first input/output end and the second voltage source. When the second voltage source is supplied before the first voltage source, the power sequencing free circuit turns on the controlled transistor to clamp the power-good signal to be lower than a predetermined voltage level.

Abstract: A power-good signal generator generates a power-good signal according to a control signal of a controller, and comprises an impedance element, a controlled transistor and a power sequencing free circuit. An end of the impedance element is coupled to a second voltage source. The controlled transistor has first and second input/output ends and a controlled end, wherein the first input/output end is coupled to the other end of the impedance element to generate the power-good signal. An operating state of the controlled transistor is changed in response to the control signal. The power sequencing free circuit is coupled to the controlled end and one of the first input/output end and the second voltage source. When the second voltage source is supplied before the first voltage source, the power sequencing free circuit turns on the controlled transistor to clamp the power-good signal to be lower than a predetermined voltage level.

Abstract: The disclosure discloses a fine frequency offset estimation method and apparatus. The method comprises: calculating a first accumulated estimation value corresponding to a first multiframe state according to a phase relevant value of a subframe and a phase of a subframe in the first multiframe state; calculating a second accumulated estimation value corresponding to a second multiframe state according to the phase relevant value of the subframe and a phase of a subframe in the second multiframe state; determining that a decision result of a multiframe state is the first multiframe state or the second multiframe state according to the first accumulated estimation value and the second accumulated estimation value; and performing a fine frequency offset estimation according to the decision result of the multiframe state. The apparatus disclosed in the disclosure is less coupled with other modules, has excellent performance in various environments, and realizes the unbiased estimation of timing offset.

Abstract: A layout structure of a MOSFET is provided. The layout structure of the MOSFET includes a plurality of MOSFET cells, a first source/drain metal bus structure and a second source/drain metal bus structure. The first source/drain metal bus structure is electrically connected to first sources/drains of the MOSFET cells, and a width thereof is gradually decreased in a predetermined direction. The second source/drain metal bus structure is electrically connected to second sources/drains of the MOSFET cells, and a width thereof is gradually increased in the predetermined direction.

Abstract: A layout structure of a MOSFET is provided. The layout structure of the MOSFET includes a plurality of MOSFET cells, a first source/drain metal bus structure and a second source/drain metal bus structure. The first source/drain metal bus structure is electrically connected to first sources/drains of the MOSFET cells, and a width thereof is gradually decreased in a predetermined direction. The second source/drain metal bus structure is electrically connected to second sources/drains of the MOSFET cells, and a width thereof is gradually increased in the predetermined direction.

Abstract: A MOSFET current limiting circuit, a linear voltage regulator, and a voltage converting circuit are provided. A current limiting value of the MOSFET is adjusted with the temperature or the voltage drop across the drain and the source of the MOSFET. Accordingly, it is ensured that the MOSFET operates in the safe operating area in any situation. Therefore, the MOSFET is prevented from being burnt out, and the reliability thereof is also increased.

Abstract: A MOS with reverse current limiting function and a voltage conversion circuit using the same is disclosed which employs a resistance unit coupled between a base and a first source/drain of a metal oxide semiconductor (MOS). When a reverse current occurs, a reverse current passing through a body diode of the MOS is limited to prevent the MOS from being burned out due to overheating. Moreover, the voltage level of the base is equal to the voltage level of the first source/drain, such that the Rds (on) of the MOS can be reduced. Therefore, a converter with the disclosed MOS may provide a higher conversion efficiency.