Patents by Inventor Zhongyu MAO

Zhongyu MAO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10592631
    Abstract: Disclosed is a method for performing netlist comparison based on a pin connection relationship of a component, comprising the steps: acquiring a schematic diagram netlist file generated by a schematic diagram, and acquiring a PCB netlist file generated by a PCB; reading a network in the schematic diagram netlist file, forming a netlist connection relationship corresponding to each network into a schematic diagram array, all schematic diagram arrays forming a schematic diagram array set; reading a network in the PCB netlist file, forming a netlist connection relationship corresponding to each network into a PCB array, all PCB arrays forming a PCB array set; and comparing the schematic diagram array set with the PCB array set, and outputting differences between the two array sets. The present disclosure merely compares the connection relationship of components.
    Type: Grant
    Filed: August 26, 2016
    Date of Patent: March 17, 2020
    Assignees: Guangzhou Fastprint Circuit Tech Co., Ltd., Shenzhen Fastprint Circuit Tech Co., Ltd.
    Inventors: Zhirui Liu, Zhongyu Mao
  • Publication number: 20180341741
    Abstract: Disclosed is a method for performing netlist comparison based on a pin connection relationship of a component, comprising the steps: acquiring a schematic diagram netlist file generated by a schematic diagram, and acquiring a PCB netlist file generated by a PCB; reading a network in the schematic diagram netlist file, forming a netlist connection relationship corresponding to each network into a schematic diagram array, all schematic diagram arrays forming a schematic diagram array set; reading a network in the PCB netlist file, forming a netlist connection relationship corresponding to each network into a PCB array, all PCB arrays forming a PCB array set; and comparing the schematic diagram array set with the PCB array set, and outputting differences between the two array sets. The present disclosure merely compares the connection relationship of components.
    Type: Application
    Filed: August 26, 2016
    Publication date: November 29, 2018
    Applicants: Guangzhou Fastprint Circuit Tech Co., Ltd., Shenzhen Fastprint Circuit Tech Co., Ltd.
    Inventors: Zhirui LIU, Zhongyu MAO