Patents by Inventor Zhou Huang

Zhou Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240136310
    Abstract: Semiconductor devices including one or more interfacing segments patterned within an outer protective layer and associated systems and methods are disclosed herein. The one or more interfacing segments may provide attachment interfaces/surfaces for connection pads. The one or more interfacing segments or a portion thereof may remain uncovered or exposed and provide warpage control for the corresponding semiconductor device.
    Type: Application
    Filed: January 3, 2024
    Publication date: April 25, 2024
    Inventors: Wei Zhou, Chien Wen Huang
  • Patent number: 11958850
    Abstract: Compounds and pharmaceutical compositions that modulate kinase activity, including mutant EGFR and mutant HER2 kinase activity, and compounds, pharmaceutical compositions, and methods of treatment of diseases and conditions associated with kinase activity, including mutant EGFR and mutant HER2 activity, are described herein.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: April 16, 2024
    Assignee: TAKEDA PHARMACEUTICAL COMPANY LIMITED
    Inventors: Wei-Sheng Huang, Yongjin Gong, Feng Li, Nicholas E. Bencivenga, David C. Dalgarno, Anna Kohlmann, William C. Shakespeare, Ranny M. Thomas, Xiaotian Zhu, Angela V. West, Willmen Youngsaye, Yun Zhang, Tianjun Zhou
  • Publication number: 20240120317
    Abstract: A fan-out semiconductor device includes stacked semiconductor dies having die bond pads arranged in columns exposed at a sidewall of the stacked semiconductor dies. The stacked dies are encapsulated in a photo imageable dielectric (PID) material, which is developed to form through-hole cavities that expose the columns of bond pads of each die at the sidewall. The through-hole cavities are plated or filled with an electrical conductor to form conductive through-holes coupling die bond pads within the columns to each other.
    Type: Application
    Filed: July 13, 2023
    Publication date: April 11, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventors: Cheng-Hsiung Yang, Chien Te Chen, Cong Zhang, Ching-Chuan Hsieh, Yu-Ying Tan, Juan Zhou, Ai-wen Wang, Yih-Fran Lee, Yu-Wen Huang
  • Publication number: 20240116674
    Abstract: The present application a model changing method and a battery tray. The model changing method includes: limiting a limited member by a pair of limiting assemblies, where each of the limiting assemblies is provided with a first limiting surface and a second limiting surface; disposing two first limiting surfaces of the pair of limiting assemblies opposite each other to form a first accommodating cavity; and disposing two second limiting surfaces of the pair of limiting assemblies opposite each other to form a second accommodating cavity, where a length of the first accommodating cavity is not equal to that of the second accommodating cavity.
    Type: Application
    Filed: December 18, 2023
    Publication date: April 11, 2024
    Applicant: ZHUHAI TITANS NEW POWER ELECTRONICS CO., LTD
    Inventors: Xiaowen LIAO, Xinhua HUANG, Zhou ZHANG
  • Publication number: 20240103052
    Abstract: The present invention relates to the cross field of smart grid and artificial intelligence, provides a non-intrusive load monitoring method and device based on physics-informed neural network, comprising the following steps: Step 1, obtaining a total load data and an equipment load data of a building in a certain period of time, and using a sliding window method to cut to construct a training data. Step 2, designing a deep learning neural network model to learn the equipment load characteristics contained in the total load data, and outputting the equipment load forecasting. Step 3, based on a physics-constrained learning framework, training the deep learning neural network model by iteratively optimizing the training loss to obtain a trained physics-informed neural network model. Step 4, monitoring the equipment's power consumption in the building according to the output results of the physics-informed neural network model.
    Type: Application
    Filed: January 14, 2023
    Publication date: March 28, 2024
    Inventors: GANG HUANG, WEI HUA, ZHOU ZHOU
  • Patent number: 11940822
    Abstract: A semiconductor device includes an analog voltage regulator and an integrated circuit module. The analog voltage regulator generates a regulated output voltage. The integrated circuit module generates an analog sense voltage based on the regulated output voltage and includes integrated circuit dies, a first sensor, second sensors, and a digital voltage offset controller (DVOC). The first sensor generates a digital reference voltage based on an analog reference voltage. The second voltage sensors detect voltages at predetermined locations on the integrated circuit dies. The DVOC generates a digital offset voltage substantially equal to the difference between the digital reference voltage and the voltage detected by a selected one of the second voltage sensors. The regulated output voltage is based on an unregulated input voltage, the analog sense voltage, and the digital offset voltage.
    Type: Grant
    Filed: May 26, 2022
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Haohua Zhou, Mei Hsu Wong, Tze-Chiang Huang
  • Patent number: 11920981
    Abstract: The present application relates to a spectral restoring method, including: acquiring a light energy response signal matrix output by a photosensitive chip of a spectral imaging device and a standard spectrum; determining a primitive restoring function and a response signal vector of the primitive restoring function based on the light energy response signal matrix, the primitive restoring function restoring a spectral image value of a predetermined channel corresponding thereto using a predetermined pixel value of the photosensitive chip and pixel values in the vicinity thereof; acquiring a restoring tensor, the product of the restoring tensor and the response signal vector being equal to an output of the primitive restoring function based on the response signal vector; and obtaining a restored spectral image based on the product of the restoring tensor and the response signal vector.
    Type: Grant
    Filed: September 9, 2022
    Date of Patent: March 5, 2024
    Assignee: BEIJING SEETRUM TECHNOLOGY CO., LTD.
    Inventors: Boyu Deng, Zhilei Huang, Yu Wang, Zhou Wang
  • Patent number: 11894388
    Abstract: The application discloses a method adapted to manufacture an array substrate and a display panel. The method includes: forming a photoresist layer, a source and a drain; post-baking the photoresist layer, so that the photoresist layer flows to the position of a channel; etching a semiconductor layer to obtain a preset pattern; and peeling off the photoresist layer.
    Type: Grant
    Filed: October 27, 2022
    Date of Patent: February 6, 2024
    Assignee: HKC CORPORATION LIMITED
    Inventor: Bei Zhou Huang
  • Publication number: 20240028330
    Abstract: The current document is directed to methods and subsystems that manage submitted code changes for processing by continuous-integration/continuous-delivery/deployment systems. In disclosed implementations, code changes are processed as quickly as possible, when the code changes are flagged as being urgent. Non-urgent code changes are evaluated for the possibility of merging the non-urgent code changes with additional, subsequently submitted code changes in order to more efficiently employ computational resources needed for processing the code changes. When there is a code change, waiting for processing, with which a submitted code change can be merged, the submitted code change is merged with the waiting code change so that the merged code changes can be together verified.
    Type: Application
    Filed: August 18, 2022
    Publication date: January 25, 2024
    Applicant: VMware, Inc.
    Inventors: Yang Yang, Yang Yang, Sixuan Yang, Jin Feng, Chengmao Lu, Zhou Huang, Junchi Zhang
  • Publication number: 20240021548
    Abstract: A semiconductor device and method of manufacturing that includes a first etch stop layer and a second etch stop layer to prevent delamination and damage to underlying components. A first passivation layer and a second passivation layer are disposed on a substrate, with a metal pad exposed through the passivation layers and contacting a top metal component of the substrate. The first etch stop layer is then formed on the second passivation layer and the metal pad. A third passivation layer is then formed on the substrate with an opening to the metal pad, which is covered by the first etch stop layer. The second etch stop layer is then formed on the third passivation layer and in the opening on the second etch stop layer. A bottom metal film/conductive component is then formed on the second etch stop layer, photoresist is applied, and wet etching is performed. The metal pad is protected from damage caused by delamination of the second etch stop layer by the first etch stop layer.
    Type: Application
    Filed: July 13, 2022
    Publication date: January 18, 2024
    Inventors: Wei-Chun Liao, Guo-Zhou Huang, Huan-Kuan Su, Yu-Hong Pan, Wen Han Hung, Ling-Sung Wang
  • Patent number: 11735639
    Abstract: This application discloses an array substrate and a display panel. The array substrate includes a first metal layer and a second metal layer, and an area of a region overlapping the second metal layer on the first metal layer is less than that of a region not overlapping the second metal layer on the first metal layer.
    Type: Grant
    Filed: October 31, 2018
    Date of Patent: August 22, 2023
    Assignee: HKC CORPORATION LIMITED
    Inventor: Bei Zhou Huang
  • Patent number: 11645994
    Abstract: The present application discloses a display panel and a display device. In each set of transmission signal lines, the line width of a transmission signal line correspondingly connected to a clock signal line close to the display area is smaller than that of a transmission signal line correspondingly connected to a clock signal line away from the display area.
    Type: Grant
    Filed: March 29, 2022
    Date of Patent: May 9, 2023
    Assignee: HKC CORPORATION LIMITED
    Inventor: Bei Zhou Huang
  • Patent number: 11604712
    Abstract: A method is provided for a hyper-converged storage-compute system to implement an active-active failover architecture for providing Internet Small Computer System Interface (iSCSI) target service. The method intelligently selects multiple hosts to become storage nodes that process iSCSI input/output (I/O) for a target. The method further enables iSCSI persistent reservation (PR) to handle iSCSI I/Os from multiple initiators.
    Type: Grant
    Filed: November 16, 2018
    Date of Patent: March 14, 2023
    Assignee: VMWARE, INC.
    Inventors: Zhaohui Guo, Yang Yang, Haitao Zhou, Jian Zhao, Zhou Huang, Jin Feng
  • Publication number: 20230048505
    Abstract: The application discloses a method adapted to manufacture an array substrate and a display panel. The method includes: forming a photoresist layer, a source and a drain; post-baking the photoresist layer, so that the photoresist layer flows to the position of a channel; etching a semiconductor layer to obtain a preset pattern; and peeling off the photoresist layer.
    Type: Application
    Filed: October 27, 2022
    Publication date: February 16, 2023
    Inventor: BEI ZHOU HUANG
  • Publication number: 20230039875
    Abstract: An adaptive idle detection method determines whether software defined data centers (SDDCs) in a hyperconverged infrastructure (HCI) environment are idle. Idleness may be quantified via a coefficient of variation (CV) against resource usage, so as to adapt the idle detection method to SDDCs with different hardware specifications and workloads. Management overhead may also be filtered out by the idle detection method, and the idle detection method may use idleness scores to further reduce overhead.
    Type: Application
    Filed: September 8, 2021
    Publication date: February 9, 2023
    Applicant: VMware, Inc.
    Inventors: Jiushi WAN, Jin FENG, Zhou HUANG, Jian ZHAO, Yang YANG
  • Patent number: 11567376
    Abstract: the present application provides a display panel and manufacturing method thereof, the display panel includes: a substrate, which comprises a first substrate and a second substrate arranged oppositely; a black matrix layer, formed on the first substrate; an alignment layer, formed on the black matrix layer and the second substrate; a color filter layer, formed on the first substrate or the second substrate; a liquid crystal layer, formed between the first substrate and the second substrate; and an active switch, formed on the substrate; where at least one groove is formed on the black matrix layer, a shading layer is formed on the position of the substrate corresponding to the groove, and the area of the substrate in which the groove is orthogonally projected is fully covered by the area of the substrate in which the shading layer is orthogonally projected.
    Type: Grant
    Filed: December 12, 2017
    Date of Patent: January 31, 2023
    Assignee: HKC CORPORATION LIMITED
    Inventor: Bei Zhou Huang
  • Patent number: 11567118
    Abstract: The present application discloses a testing device of array substrates and a testing method. The testing device of array substrates includes: a machine and testing interfaces, the testing interfaces being disposed on the machine; and testers disposed above the machine. There are at least two sets of testers, and the testers synchronously operate according to a preset scheme.
    Type: Grant
    Filed: August 9, 2022
    Date of Patent: January 31, 2023
    Assignee: HKC CORPORATION LIMITED
    Inventor: Bei Zhou Huang
  • Patent number: 11541437
    Abstract: The present application discloses a cleaning method and a cleaning device. The cleaning method includes the following steps: dividing a cleaning device into at least two regions to control for the same cleaning mode; detecting a width of an object to be cleaned; and turning on the cleaning device of corresponding region according to the width of the object to be cleaned. The cleaning device includes a detection structure, a conveying structure, a washing structure, an air knife structure, and a control structure, where the washing structure is divided into at least two regions, and the air knife structure is also divided into at least two regions.
    Type: Grant
    Filed: October 23, 2018
    Date of Patent: January 3, 2023
    Assignee: HKC CORPORATION LIMITED
    Inventor: Bei Zhou Huang
  • Patent number: 11526058
    Abstract: This application discloses a display panel and a display apparatus. The display panel includes a common electrode cable, an active switch, and a signal cable. The signal cable is overlapped with the active switch to form a first overlapping region, and a first extension cable and a second extension cable of the common electrode cable are connected to the signal cable to form a second overlapping region and a third overlapping region.
    Type: Grant
    Filed: November 1, 2018
    Date of Patent: December 13, 2022
    Assignee: HKC CORPORATION LIMITED
    Inventor: Bei Zhou Huang
  • Publication number: 20220381819
    Abstract: The present application discloses a testing device of array substrates and a testing method. The testing device of array substrates includes: a machine and testing interfaces, the testing interfaces being disposed on the machine; and testers disposed above the machine. There are at least two sets of testers, and the testers synchronously operate according to a preset scheme.
    Type: Application
    Filed: August 9, 2022
    Publication date: December 1, 2022
    Inventor: BEI ZHOU HUANG