Abstract: An array substrate and a method for manufacturing the same and a liquid crystal display panel are provided. An indium tin oxide (ITO) layer is disposed entirely on the second metal layer, and a plurality of through-holes are disposed in the passivation layer at locations corresponding to the drain electrodes in the second metal layer, so that the pixel electrodes in the pixel electrode layer are electrically connected to the ITO layer via the through-holes, and the ITO layer is electrically connected to the second metal layer. According to the present disclosure, transmittance of light is efficiently increased and performance of LCD is enhanced.

Abstract: Disclosed is a manufacturing method of a color filter substrate, comprising: providing a first substrate, and the first substrate comprising pixel unit regions and a light blocking region located between the pixel unit regions, coating a photoresist material on the first substrate, and exposing the pixel unit regions to form monochromatic blocks, and partially exposing the light blocking region to form color blocks; coating a black photoresist material in the light blocking region, and the black photoresist material covering the color blocks; exposing the black photoresist material and the black photoresist material located in the light blocking region forming a black matrix and the black photoresist material covering the color blocks forming spacers. The black photoresist material, of which the color blocks are used to be the substrate, form spacers, and the black photoresist material in the rest part of the light blocking region forms a black matrix.

Abstract: An array substrate and a liquid crystal display (LCD) panel thereof are described. The array substrate includes a bottom substrate; a thin film transistor disposed on the bottom substrate; a first passivation layer disposed on the thin film transistor and comprising a first opening which exposes the drain electrode region of the thin film transistor; a color resist layer disposed on the first passivation layer and configured to form a color filter, wherein the color resist layer comprises a second opening corresponding to the first opening to expose the drain electrode region of the thin film transistor; a pixel electrode layer disposed on the color resist layer and formed by electrically connecting the first opening and the second opening to the drain electrode region of the thin film transistor; and a second passivation layer disposed on the pixel electrode layer.

Abstract: An array substrate is provided, and comprises: a first metal layer, a first insulation layer, a second metal layer, a second insulation layer, a pixel electrode layer, and a color filter layer. The first metal layer comprises light-shading lines. The second metal layer comprises data lines. In interfaces of color resists, lights are shaded by crossing the light-shading lines and the data lines, and by stacking color resists. This can achieve an entire lightproof effect, but is unnecessary to be provided with black matrices.

Abstract: The present disclosure relates to a gray-tone mask (GTM) and the manufacturing method thereof. The GTM includes at least one first light-blocking bar and at least on second light-blocking bar. A first gap is formed between any two adjacent first light-blocking bars. The second light-blocking bar is arranged within the first gap. The first gap includes a first crack being formed between adjacent first light-blocking bar and second light-blocking bar, wherein a length of the second light-blocking bar is “a”, a width of the first crack is “b”, and a ratio of the length of the second light-blocking bar (“a”) to the width of the first crack (“b”) satisfy the relationship: 0.9<a/b<1.1. In this way, the design scope is limited. Thus, a reasonable GTM design may be obtain and the experimental cost may be reduced.

Abstract: A method for manufacturing an array substrate is disclosed and includes steps of: sequentially forming a first metal layer, an insulating layer and a second metal layer on a glass substrate; forming a passivation layer on the second metal layer; performing a first etching process on the passivation layer to obtain a first groove and a second groove; performing a second etching process on the passivation layer to obtain a third groove; and forming a pixel electrode layer on the passivation layer. The method saves one photomask and a photolithography step, thereby reducing the cost and improving the efficiency.

Abstract: Disclosed is a main synchronization sequence design method for global covering multi-beam satellite LTE, comprising the follow steps: extending a standard Zadoff-Chu sequence to a generalized Zadoff-Chu sequence so as to obtain an initial candidate main synchronization sequence set of more candidate sequences; gradually narrowing down the candidate main synchronization sequence set according to a selection standard of a main synchronization sequence to obtain a final candidate main synchronization sequence set; and obtaining a main synchronization sequence set with optimal eclectic performance and complexity from the final candidate main synchronization sequence set. According to the present invention, a main synchronization sequence with optimal eclectic performance and calculation complexity can be designed for a global covering same-frequency networking multi-beam satellite LTE system.

Abstract: The present disclosure relates to a gray-tone mask (GTM) and the manufacturing method thereof. The GTM includes at least one first light-blocking bar and at least on second light-blocking bar. A first gap is formed between any two adjacent first light-blocking bars. The second light-blocking bar is arranged within the first gap. The first gap includes a first crack being formed between adjacent first light-blocking bar and second light-blocking bar, wherein a length of the second light-blocking bar is “a”, a width of the first crack is “b”, and a ratio of the length of the second light-blocking bar (“a”) to the width of the first crack (“b”) satisfy the relationship: 0.9<a/b<1.1. In this way, the design scope is limited. Thus, a reasonable GTM design may be obtain and the experimental cost may be reduced.

Abstract: An array substrate is provided, and comprises: a first metal layer, a first insulation layer, a second metal layer, a second insulation layer, a pixel electrode layer, and a color filter layer. The first metal layer comprises light-shading lines. The second metal layer comprises data lines. In interfaces of color resists, lights are shaded by crossing the light-shading lines and the data lines, and by stacking color resists. This can achieve an entire lightproof effect, but is unnecessary to be provided with black matrices.

Abstract: A method for manufacturing an array substrate is disclosed and includes steps of: sequentially forming a first metal layer, an insulating layer and a second metal layer on a glass substrate; forming a passivation layer on the second metal layer; performing a first etching process on the passivation layer to obtain a first groove and a second groove; performing a second etching process on the passivation layer to obtain a third groove; and forming a pixel electrode layer on the passivation layer. The method saves one photomask and a photolithography step, thereby reducing the cost and improving the efficiency.

Abstract: A display panel and a manufacturing method thereof are provided. The display panel has a first display area, a second display area, and a non-display. A color film of the first display area has a first color barrier corresponding to the first display area, and a second color barrier corresponding to the second display area. A first light shielding block of the first panel corresponds to the non-display area. A second light shielding block of the second panel corresponds to the non-display area. The present invention can prevent the light leakage problem of the display panel.

Abstract: A thin film transistor (TFT) array substrate and its manufacturing method are disclosed. The TFT array substrate includes a component assembly layer, a passivation layer and a pixel electrode layer. The passivation layer is disposed on the component assembly layer, and a hole and a first recess are provided on the passivation layer. The pixel electrode layer is disposed on the passivation layer and inside the first recess, and the pixel electrode layer is connected with the second signal line layer by the hole. The present invention can reduce the manufacturing cost and improve the manufacturing efficiency.

Abstract: A thin-film transistor (TFT) array substrate and a manufacturing method thereof are provided. The TFT array substrate comprises an element lamination substrate, a passivation layer, and pixel electrode layer. The passivation layer is disposed on the element lamination substrate, and is provided with at least one via hole and a groove array, wherein the groove array includes at least two grooves. The pixel electrode layer is disposed on the passivation layer and inside the grooves, wherein the pixel electrode layer is connected to a second signal line layer through the via hole. This can reduce the cost of manufacturing the TFT array substrate, and increase the manufacturing efficiency of the TFT array substrate.

Abstract: Disclosed is a main synchronization sequence design method for global covering multi-beam satellite LTE, comprising the follow steps: extending a standard Zadoff-Chu sequence to a generalized Zadoff-Chu sequence so as to obtain an initial candidate main synchronization sequence set of more candidate sequences; gradually narrowing down the candidate main synchronization sequence set according to a selection standard of a main synchronization sequence to obtain a final candidate main synchronization sequence set; and obtaining a main synchronization sequence set with optimal eclectic performance and complexity from the final candidate main synchronization sequence set. According to the present invention, a main synchronization sequence with optimal eclectic performance and calculation complexity can be designed for a global covering same-frequency networking multi-beam satellite LTE system.