Abstract: A shielded semiconductor device is assembled using a lead frame having a die receiving area, leads disposed around the die receiving area, and a bendable strip formed in the die receiving area. Each lead has an inner lead end that is spaced from but near to one of the sides of the die receiving area and an outer lead end that is distal to that side of the die receiving area. An IC die is attached to the die receiving area and electrically connected to the inner lead ends of the leads. An encapsulant is formed over the die and the electrical connections and forms a body. The strip is bent to extend vertically to a top side of the body. A lid is formed on the top side of the body and is in contact with a distal end of the vertical strip.

Abstract: A shielded semiconductor device is assembled using a lead frame having a die receiving area, leads disposed around the die receiving area, and a bendable strip formed in the die receiving area. Each lead has an inner lead end that is spaced from but near to one of the sides of the die receiving area and an outer lead end that is distal to that side of the die receiving area. An IC die is attached to the die receiving area and electrically connected to the inner lead ends of the leads. An encapsulant is formed over the die and the electrical connections and forms a body. The strip is bent to extend vertically to a top side of the body. A lid is formed on the top side of the body and is in contact with a distal end of the vertical strip.

Abstract: A universal substrate for assembling ball grid array (BGA) type integrated circuit packages has a non-conducting matrix, an array of conducting vias extending between top and bottom surfaces of the matrix, and one or more instances of each of two or more different types of fiducial pairs on the top surface of the matrix. Each instance of each different fiducial pair indicates a location of a different via sub-array of the substrate for a different BGA package of a particular package size. The same substrate can be used to assemble BGA packages of different size, thereby avoiding having to design a different substrate for each different BGA package size.

Abstract: A universal substrate for assembling ball grid array (BGA) type integrated circuit packages has a non-conducting matrix, an array of conducting vias extending between top and bottom surfaces of the matrix, and one or more instances of each of two or more different types of fiducial pairs on the top surface of the matrix. Each instance of each different fiducial pair indicates a location of a different via sub-array of the substrate for a different BGA package of a particular package size. The same substrate can be used to assemble BGA packages of different size, thereby avoiding having to design a different substrate for each different BGA package size.

Abstract: A method of forming a pillar bump includes feeding a bond wire in a capillary. The capillary has a hole portion and a chamfer section arranged downstream of the hole portion. The hole portion has a length along a feed direction of the bond wire that is greater than a maximum diameter of the hole portion. The method further includes performing an electric flame off (EFO) on a free end of the bond wire extending from the chamfer section to form a free air ball (FAB), tensioning the bond wire and applying a vacuum to the capillary to withdraw a portion of the FAB back into the capillary to substantially fill the hole portion for forming a tower, attaching the FAB to a bonding site, and at least partially removing the capillary from the bonding site and breaking the bond wire above the tower.

Abstract: A substrate for use in semiconductor device assembly has an electrically insulating body with a die mounting surface and an opposite grid array surface. An array of external electrical connection pads is located in the grid array surface. Substrate bond padsare located in the die mounting surface. Interconnects in the insulating body selectively interconnect the substrate bond padsto the external electrical connection pads. Tertiary bond pads are located in the die mounting surface and are electrically isolated from the external electrical connection pads.

Abstract: A lead frame has a trace embedded in an encapsulant and a plurality of stubs (i) embedded in the encapsulant and (ii) connected to and extending from the trace at different locations along the length of the trace. The stubs inhibit the formation of cracks that may otherwise form along the trace due to thermal or mechanical bending of the lead frame, especially cracks that tend to occur along the four linear edge traces located at the periphery of some conventional embedded lead frames.

Abstract: A method of attaching a bond wire to first and second electrical contact pads includes holding the bond wire in a capillary, wherein a first end of the bond wire extends out of an opening in the capillary, attaching the first end of the bond wire to the first electrical contact pad using a ball bonding technique, moving a second end of the bond wire toward the second electrical contact pad after the attachment of the first end of the bond wire, performing an electric flame off on the second end of the bond wire without forming a free air ball, and attaching the second end of the bond wire to the second electrical contact pad after the EFO on the second end of the bond wire.

Abstract: A bonded wire semiconductor device includes a sub-assembly including a semiconductor die having an active face with a set of internal electrical contact elements and an externally exposed set of electrical contact elements. A set of bond wires make respective electrical connections between the internal electrical contact elements and the externally exposed set of electrical contact elements. A molding compound encapsulates the semiconductor die with the active face embedded in the molding compound. The bond wires have the same length. The bond wires are bonded to the internal electrical contact elements and to the externally exposed electrical contact elements at first and second curved arrays and of bond positions respectively. The first and second curved arrays and of bond positions have corresponding concentric shapes.

Abstract: A bonded wire semiconductor device includes a sub-assembly including a semiconductor die having an active face with a set of internal electrical contact elements and an externally exposed set of electrical contact elements. A set of bond wires make respective electrical connections between the internal electrical contact elements and the externally exposed set of electrical contact elements. A molding compound encapsulates the semiconductor die with the active face embedded in the molding compound. The bond wires have the same length. The bond wires are bonded to the internal electrical contact elements and to the externally exposed electrical contact elements at first and second curved arrays and of bond positions respectively. The first and second curved arrays and of bond positions have corresponding concentric shapes.

Abstract: A lead frame for a semiconductor package has a flag to which a semiconductor die is mounted. Tie bars are coupled to the flag. There is a first set of leads and each first set lead in the first set of leads has a first set lead parallel length and a first set lead tapered length. The first set lead parallel length of each first set lead has a constant width and edges that are parallel to edges of all other first set lead parallel lengths. A free end region of the first set lead tapered length of each first set lead provides a first set lead bond target region. There is a second set of leads disposed between a first one of the tie bars and the first set of leads. Each second set lead, in the second set of leads, has a second set lead parallel length and a second set lead tapered length.