Patents by Inventor Ziang Yang

Ziang Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260244867
    Abstract: Fixed-shaped large language models (LLMs) are generated to perform dual-mode inference. First, a base model of dynamic shapes is quantized. A first LLM and a second LLM are generated from the base model after the quantizing. The first LLM has a fixed input shape greater than one, and the second LLM has a fixed input shape of one. The first LLM and the second LLM have the same network structure and the same weights. The layers of the network structure are grouped into multiple chunks. The number of layers in each chunk is determined by a size limit of a target device memory that loads the chunks during inference. The first LLM and the second LLM are compiled for inference time execution of an LLM task on a target device. The compiling incorporates information of the chunks.
    Type: Application
    Filed: February 19, 2025
    Publication date: August 20, 2026
    Inventors: Jia Yao Christopher Lim, Kelvin Kae Wen Teh, Po-Yen Lin, Chia-Wei Hsu, Yu-Lung Lu, Hung-jen Chen, Chung-Li Lu, Wai Mun Wong, Deep Yap, Jung Hau Foo, Timothy Jun Jie Lee, Ziang Yang
  • Patent number: 11984110
    Abstract: A device operates to perform acoustic echo cancellation. The device includes a speaker to output a far-end signal at the device, a microphone to receive at least a near-end signal and the far-end signal from the speaker to produce a microphone output, and an AI accelerator operative to perform neural network operations according to a first neural network model and a second neural network model to output an echo-suppressed signal. The device further includes a digital signal processing (DSP) unit. The DSP unit is operative to perform adaptive filtering to remove at least a portion of the far-end signal from the microphone output to generate a filtered near-end signal, and perform Fast Fourier Transform (FFT) and inverse FFT (IFFT) to generate input to the first neural network model and the second neural network model, respectively.
    Type: Grant
    Filed: March 7, 2022
    Date of Patent: May 14, 2024
    Assignee: MEDIATEK SINGAPORE PTE. LTD.
    Inventors: Xiaoxi Yu, Hantao Huang, Ziang Yang, Chia Hsin Yang, Li-Wei Cheng
  • Publication number: 20240004952
    Abstract: A bit-widths determination method selects bit-widths for mixed-precision neural network computing on a target hardware platform. An activation quantization sensitivity (AQS) value is calculated for each convolution layer in a neural network. The AQS value indicates the sensitivity of convolution output to quantized convolution input. One or more convolution layers are grouped into a quantization group, which is to be executed by a corresponding set of target hardware. A group AQS value is calculated for each quantization group based on the AQS values of the convolution layers in the quantization group. Then bit-widths supported by the target hardware platform are selected for the corresponding quantization groups. The bit-widths are selected to optimize, under a given constraint, a sensitivity metric that is calculated based on each quantization group's group AQS value.
    Type: Application
    Filed: June 29, 2022
    Publication date: January 4, 2024
    Inventors: Hantao Huang, Ziang Yang, Jia Yao Christopher Lim, Jung Hau Foo, Chia-Lin Yu
  • Publication number: 20230282197
    Abstract: A device operates to perform acoustic echo cancellation. The device includes a speaker to output a far-end signal at the device, a microphone to receive at least a near-end signal and the far-end signal from the speaker to produce a microphone output, and an AI accelerator operative to perform neural network operations according to a first neural network model and a second neural network model to output an echo-suppressed signal. The device further includes a digital signal processing (DSP) unit. The DSP unit is operative to perform adaptive filtering to remove at least a portion of the far-end signal from the microphone output to generate a filtered near-end signal, and perform Fast Fourier Transform (FFT) and inverse FFT (IFFT) to generate input to the first neural network model and the second neural network model, respectively.
    Type: Application
    Filed: March 7, 2022
    Publication date: September 7, 2023
    Inventors: Xiaoxi Yu, Hantao Huang, Ziang Yang, Chia Hsin Yang, Li-Wei Cheng