Abstract: The present invention discloses a high-boron cast steel material resisting high-temperature molten aluminum corrosion-abrasion and a preparation method thereof. The material includes the following compositions (wt.%): C: 0.1 to 1, B: 1.0 to 6.5, Cr: 7.5 to 25, Mo: 0.5 to 12.5, Si: 0.5 to 3.5, Al: 0.5 to 8.5, Mn: 0.2 to 1.2, S: less than 0.05, P: less than 0.05, and a balance of Fe. The method includes the following steps: annealing an obtained casting, and conducting quenching and tempering treatment to obtain the material.

Abstract: An integrated circuit (IC) includes multiple embedded test circuits that all include a ring oscillator coupled to a test load. The test load either is a direct short in the ring oscillator or else is a interconnect load that is representative of one of the interconnect layers in the IC. A model equation is defined for each embedded test circuit, with each model equation specifying the output delay of its associated embedded test circuit as a function of Front End OF the Line (FEOL) and Back End Of the Line (BEOL) parameters. The model equations are then solved for the various FEOL and BEOL parameters as functions of the test circuit output delays. Finally, measured output delay values are substituted in to these parameter equations to generate actual values for the various FEOL and BEOL parameters, thereby allowing any areas of concern to be quickly and accurately identified.

Abstract: An integrated circuit (IC) includes multiple embedded test circuits that all include a ring oscillator coupled to a test load. The test load either is a direct short in the ring oscillator or else is a interconnect load that is representative of one of the interconnect layers in the IC. A model equation is defined for each embedded test circuit, with each model equation specifying the output delay of its associated embedded test circuit as a function of Front End OF the Line (FEOL) and Back End Of the Line (BEOL) parameters. The model equations are then solved for the various FEOL and BEOL parameters as functions of the test circuit output delays. Finally, measured output delay values are substituted in to these parameter equations to generate actual values for the various FEOL and BEOL parameters, thereby allowing any areas of concern to be quickly and accurately identified.