Patents by Inventor Zichuan Cheng

Zichuan Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11928017
    Abstract: A method includes receiving a point data anomaly detection query from a user. The query requests the data processing hardware to determine a quantity of anomalous point data values in a set of point data values. The method includes training a model using the set of point data values. For at least one respective point data value in the set of point data values, the method includes determining, using the trained model, a variance value for the respective point data value and determining that the variance value satisfies a threshold value. Based on the variance value satisfying the threshold value, the method includes determining that the respective point data value is an anomalous point data value. The method includes reporting the determined anomalous point data value to the user.
    Type: Grant
    Filed: May 21, 2022
    Date of Patent: March 12, 2024
    Assignee: Google LLC
    Inventors: Zichuan Ye, Jiashang Liu, Forest Elliott, Amir Hormati, Xi Cheng, Mingge Deng
  • Patent number: 9653129
    Abstract: Apparatus for chip-to-chip communications may include a first driving unit and a second driving unit. The first driving unit may receive input data, generate a first output data based on the input data, and output the first output data. The second driving unit may receive the input data, generate a second output data with a pre-emphasis peak and output the second output data. The second output data may be generated by delaying and inverting the input data, and have a predetermined weight.
    Type: Grant
    Filed: December 17, 2015
    Date of Patent: May 16, 2017
    Assignee: SK Hynix Memory Solutions Inc.
    Inventors: Chun-Ju Shen, Jenn-Gang Chern, Zichuan Cheng, Huei-Ching You
  • Publication number: 20160180897
    Abstract: Apparatus for chip-to-chip communications may include a first driving unit and a second driving unit. The first driving unit may receive input data, generate a first output data based on the input data, and output the first output data. The second driving unit may receive the input data, generate a second output data with a pre-emphasis peak and output the second output data. The second output data may be generated by delaying and inverting the input data, and have a predetermined weight.
    Type: Application
    Filed: December 17, 2015
    Publication date: June 23, 2016
    Inventors: Chun-Ju SHEN, Jenn-Gang CHERN, Zichuan CHENG, Huei-Ching YOU
  • Publication number: 20150042296
    Abstract: A linear voltage regulator is disclosed. The linear voltage regulator includes an amplifier. The linear voltage regulator also includes a plurality of power devices. At least one of the power devices is electrically coupled to the amplifier. A switch is configured to control at least one power device of the plurality of power devices and a delay component is configured to trigger the switch.
    Type: Application
    Filed: June 17, 2014
    Publication date: February 12, 2015
    Inventors: Zichuan Cheng, Danfeng Xu
  • Patent number: 8791691
    Abstract: A signal detector includes a summation unit connected to offset first and second input signals representing a differential input signal into two offset pairs of first and second signals. The signal detector also includes a detection unit connected to select the first signal from one of the offset pairs of first and second signals and the second signal from the other of the offset pairs in an overlap portion of the first and second signals to form a complementary pair of overlap signals and provide a differentially peak-detected output signal from the complementary pair of overlap signals. Additionally, the signal detector includes a comparator connected to provide a detection output signal corresponding to the differentially peak-detected output signal and a reference signal. A method of operating a signal detector is also included.
    Type: Grant
    Filed: March 24, 2011
    Date of Patent: July 29, 2014
    Assignee: LSI Corporation
    Inventor: Zichuan Cheng
  • Publication number: 20120242327
    Abstract: A signal detector includes a summation unit connected to offset first and second input signals representing a differential input signal into two offset pairs of first and second signals. The signal detector also includes a detection unit connected to select the first signal from one of the offset pairs of first and second signals and the second signal from the other of the offset pairs in an overlap portion of the first and second signals to form a complementary pair of overlap signals and provide a differentially peak-detected output signal from the complementary pair of overlap signals. Additionally, the signal detector includes a comparator connected to provide a detection output signal corresponding to the differentially peak-detected output signal and a reference signal. A method of operating a signal detector is also included.
    Type: Application
    Filed: March 24, 2011
    Publication date: September 27, 2012
    Applicant: LSI Corporation
    Inventor: Zichuan Cheng