Patents by Inventor Zidong Jiang

Zidong Jiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220075639
    Abstract: In one example, a system for executing applications can include a main processor to initialize a virtual machine to execute an application. The main processor can also determine a main utilization indicator of the main processor is above a threshold and an auxiliary utilization indicator of an auxiliary processor is below a threshold, wherein the auxiliary processor is based on an auxiliary instruction set architecture. Additionally, the main processor can transmit an instruction from the application to the auxiliary processor for execution and update context data for the application in response to receiving an execution result from the auxiliary processor.
    Type: Application
    Filed: August 18, 2021
    Publication date: March 10, 2022
    Inventors: Tianyou Li, Shu Xu, Jinkui Ren, Zidong Jiang, Weiliang Lin, Chaobo Zhu, Yong Hu
  • Patent number: 11099879
    Abstract: In one example, a system for executing applications can include a main processor to initialize a virtual machine to execute an application. The main processor can also determine a main utilization indicator of the main processor is above a threshold and an auxiliary utilization indicator of an auxiliary processor is below a threshold, wherein the auxiliary processor is based on an auxiliary instruction set architecture. Additionally, the main processor can transmit an instruction from the application to the auxiliary processor for execution and update context data for the application in response to receiving an execution result from the auxiliary processor.
    Type: Grant
    Filed: December 16, 2016
    Date of Patent: August 24, 2021
    Assignee: Intel Corporation
    Inventors: Tianyou Li, Shu Xu, Jinkui Ren, Zidong Jiang, Weiliang Lin, Chaobo Zhu, Yong Hu
  • Patent number: 10802979
    Abstract: Systems and techniques for dynamic code execution location in heterogeneous memory are described herein. In an system having a first class of memory and second class of memory that are both byte-addressable, an interpreter may be initialized to execute a program from the first class of memory. The initialization may include locating an Interpreter Routine Address Table (IRIT) in the second class of memory and creating counters for routines in the IRIT. A counter for a routine may be modified as it is referenced from the IRIT during execution. The routine may be moved from the first class of memory to the second class of memory in response to the counter passing a threshold. An entry in the IRIT for the routine may be updated with an address in the second class of memory corresponding to the routine.
    Type: Grant
    Filed: January 27, 2017
    Date of Patent: October 13, 2020
    Assignee: Intel Corporation
    Inventors: Shu Xu, Tianyou Li, Zidong Jiang, Weiliang Lion Lin, Jinkui Ren, Chaobo Zhu, Xiaokang Qin
  • Publication number: 20190332545
    Abstract: Systems and techniques for dynamic code execution location in heterogeneous memory are described herein. In an system having a first class of memory and second class of memory that are both byte-addressable, an interpreter may be initialized to execute a program from the first class of memory. The initialization may include locating an Interpreter Routine Address Table (IRIT) in the second class of memory and creating counters for routines in the IRIT. A counter for a routine may be modified as it is referenced from the IRIT during execution. The routine may be moved from the first class of memory to the second class of memory in response to the counter passing a threshold. An entry in the IRIT for the routine may be updated with an address in the second class of memory corresponding to the routine.
    Type: Application
    Filed: January 27, 2017
    Publication date: October 31, 2019
    Inventors: Shu Xu, Tianyou Li, Zidong Jiang, Weiliang Lion Lin, Jinkui Ren, Chaobo Zhu, Xiaokang Qin
  • Publication number: 20190324790
    Abstract: In one example, a system for executing applications can include a main processor to initialize a virtual machine to execute an application. The main processor can also determine a main utilization indicator of the main processor is above a threshold and an auxiliary utilization indicator of an auxiliary processor is below a threshold, wherein the auxiliary processor is based on an auxiliary instruction set architecture. Additionally, the main processor can transmit an instruction from the application to the auxiliary processor for execution and update context data for the application in response to receiving an execution result from the auxiliary processor.
    Type: Application
    Filed: December 16, 2016
    Publication date: October 24, 2019
    Applicant: INTEL CORPORATION
    Inventors: Tianyou Li, Shu Xu, Jinkui Ren, Zidong Jiang, Weiliang Lin, Chaobo Zhu, Yong Hu
  • Publication number: 20180113794
    Abstract: Various systems and methods for analyzing WebGL applications are described herein. A system comprises a recorder service module to intercept a plurality of graphics application programming interface (API) function calls, each of the plurality of graphics API functions calls having an associated execution context; a command translator module to translate the plurality of graphics API functions calls to a set of generic API invocations; a code generator module to generate executable code from the set of generic API invocations; and a replayer service module to test the executable code.
    Type: Application
    Filed: June 10, 2015
    Publication date: April 26, 2018
    Inventors: Jin Yang, Junchao Han, Zidong Jiang, Yongnian Le