Patents by Inventor Zijin Lin
Zijin Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11522228Abstract: Provided is a bipolar lead-acid battery relating to the technical filed of battery. The bipolar lead-acid battery includes a housing with a battery cavity inside and a plurality of single cells provided in the battery cavity, each of the single cells has an inner cavity for electrolyte injection, and the inner cavity of each single cell is independent of one another, and the housing has a plurality of air-distributing chambers communicating with the inner cavity of the each of the single cells in one-to-one correspondence above the battery cavity, wherein the housing further has a common pressure chamber, the air-distributing chambers communicate with the common pressure chamber through vents, respectively. The bipolar lead-acid battery has the advantages that it can be successfully manufactured and can be used normally, and solves the problems of short service life and unsuccessful manufacture of the existing battery.Type: GrantFiled: December 20, 2018Date of Patent: December 6, 2022Inventors: Zijin Lin, Shuangying Chen, Huanping Chen
-
Publication number: 20210066759Abstract: Provided is a bipolar lead-acid battery relating to the technical filed of battery. The bipolar lead-acid battery includes a housing (1) with a battery cavity (11a) inside and a plurality of single cells (2) provided in the battery cavity (11a), each of the single cells (2) has an inner cavity (21) for electrolyte injection, and the inner cavity (21) of each single cell (2) is independent of one another, and the housing (1) has a plurality of air-distributing chambers (12a) communicating with the inner cavity (21) of the each of the single cells (2) in one-to-one correspondence above the battery cavity (11a), wherein the housing (1) further has a common pressure chamber (14a), the air-distributing chambers (12a) communicate with the common pressure chamber (14a) through vents (13a), respectively. The bipolar lead-acid battery has the advantages that it can be successfully manufactured and can be used normally, and solves the problems of short service life and unsuccessful manufacture of the existing battery.Type: ApplicationFiled: December 20, 2018Publication date: March 4, 2021Inventors: Chen Shuangying, Chen Huanping, Zijin LIN
-
Patent number: 10775668Abstract: Disclosed are a backlight module, a display panel, and a display device. The backlight module includes a module frame and at least one first conductive tip structure disposed inside the module frame, the first conductive tip structure includes a first conductive tip, the first conductive tip being in an exposed state of being exposed out from the module frame. The backlight module, according to a point discharge principle, preferentially performs discharging on static electricity through the conductive tip structure, to provide a novel antistatic backlight module.Type: GrantFiled: January 22, 2017Date of Patent: September 15, 2020Assignees: BOE Technology Group Co., Ltd., Beijing BOE Optoelectronics Technology Co., Ltd.Inventors: Zijin Lin, Xiaoguang Pei, Haisheng Zhao, Dongjiang Sun
-
Patent number: 10726752Abstract: An array substrate is disclosed, which includes a substrate, at least one test line, an insulating layer, and an electrostatic shielding pattern. The at least one test line is disposed over the substrate. The insulating layer is disposed over the at least one test line. The electrostatic shielding pattern is disposed over, and insulated by the insulating layer from, the at least one test line in the array substrate. The electrostatic shielding pattern is configured to absorb, and guide out from the array substrate, static electricity to thereby avoid the static electricity from entering an interior of the array substrate via the at least one test line. A method for manufacturing the array substrate, and a display panel containing the array substrate are also provided in the disclosure.Type: GrantFiled: June 1, 2017Date of Patent: July 28, 2020Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Zijin Lin, Haisheng Zhao, Xiaoguang Pei
-
Patent number: 10297449Abstract: A method for manufacturing thin film transistor, a method for manufacturing array substrate, an array substrate and a display device are provided. The method for manufacturing thin film transistor includes forming an intermediate layer on a substrate, patterning the intermediate layer to form an intermediate layer reserved region and an intermediate layer unreserved region, where the intermediate layer unreserved region corresponds to a pattern of a first structure layer, forming, on the substrate with a pattern of the intermediate layer, a material layer from which the first structure layer is formed, and removing the intermediate layer, and forming the pattern of the first structure layer through a portion of the material layer remaining on the substrate.Type: GrantFiled: May 9, 2016Date of Patent: May 21, 2019Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Zijin Lin, Haisheng Zhao, Xiaoguang Pei, Zhilong Peng, Dongjiang Sun
-
Publication number: 20190096299Abstract: An array substrate is disclosed, which includes a substrate, at least one test line, an insulating layer, and an electrostatic shielding pattern. The at least one test line is disposed over the substrate. The insulating layer is disposed over the at least one test line. The electrostatic shielding pattern is disposed over, and insulated by the insulating layer from, the at least one test line in the array substrate. The electrostatic shielding pattern is configured to absorb, and guide out from the array substrate, static electricity to thereby avoid the static electricity from entering an interior of the array substrate via the at least one test line. A method for manufacturing the array substrate, and a display panel containing the array substrate are also provided in the disclosure.Type: ApplicationFiled: June 1, 2017Publication date: March 28, 2019Applicants: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Zijin LIN, Haisheng ZHAO, Xiaoguang PEI
-
Patent number: 10215628Abstract: The present disclosure relates to an image calibrating method and device of a testing apparatus for thin film transistor (TFT) substrate. The method comprises following steps of: calculating an image offset value by using coordinate information of each pixel in a prescribed target image obtained by the testing apparatus for the thin film transistor substrate; and determining whether the offset value is smaller than a prescribed threshold value, in a case where the offset value is not smaller than the prescribed threshold value, adjusting the image by using the offset value and recalculating the offset value by using the coordinate information of each pixel in the adjusted image; in a case where the offset value is smaller than the prescribed threshold value, calibrating the image obtained by the testing apparatus for the thin film transistor substrate with the offset value as a calibrating value.Type: GrantFiled: June 30, 2014Date of Patent: February 26, 2019Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Zijin Lin, Haisheng Zhao, Xiaoguang Pei, Chaoyang Deng, Haitao Ma
-
Publication number: 20180331131Abstract: A method for manufacturing thin film transistor, a method for manufacturing array substrate, an array substrate and a display device are provided. The method for manufacturing thin film transistor includes forming an intermediate layer on a substrate, patterning the intermediate layer to form an intermediate layer reserved region and an intermediate layer unreserved region, where the intermediate layer unreserved region corresponds to a pattern of a first structure layer, forming, on the substrate with a pattern of the intermediate layer, a material layer from which the first structure layer is formed, and removing the intermediate layer, and forming the pattern of the first structure layer through a portion of the material layer remaining on the substrate.Type: ApplicationFiled: May 9, 2016Publication date: November 15, 2018Applicants: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Zijin LIN, Haisheng ZHAO, Xiaoguang PEI, Zhilong PENG, Dongjiang SUN
-
Publication number: 20180164641Abstract: Disclosed are a backlight module, a display panel, and a display device. The backlight module includes a module frame and at least one first conductive tip structure disposed inside the module frame, the first conductive tip structure includes a first conductive tip, the first conductive tip being in an exposed state of being exposed out from the module frame. The backlight module, according to a point discharge principle, preferentially performs discharging on static electricity through the conductive tip structure, to provide a novel antistatic backlight module.Type: ApplicationFiled: January 22, 2017Publication date: June 14, 2018Applicants: BOE Technology Group Co., Ltd., Beijing BOE Optoelectronics Technology Co., Ltd.Inventors: Zijin Lin, Xiaoguang Pei, Haisheng Zhao, Dongjiang Sun
-
Publication number: 20170373099Abstract: Disclosed are an array substrate, a manufacturing method thereof, and a display device. The array substrate includes a gate insulating layer, an active layer, source-drain electrodes, a first conductive layer and an isolation insulating layer), the source-drain electrodes are in contact with the active layer, the gate insulating layer is located on a surface of the active layer, the isolation insulating layer) is located on another surface of the active layer, and the isolation insulating layer at least includes a first hollow structure in a contacting region of the active layer and the source-drain electrodes; the isolation insulating layer is configured to isolate residue of the active layer located outside a region where the first hollow structure is located from contacting the first conductive layer.Type: ApplicationFiled: August 4, 2016Publication date: December 28, 2017Inventors: Zijin LIN, Haisheng ZHAO, Zhilong PENG, Dongjiang SUN
-
Patent number: 9798167Abstract: An alignment system includes: a light emitting device located on one side of an object to be aligned for emitting light towards the object to be aligned; a light receiving device located on the other side of the object to be aligned and at a standard position corresponding to an alignment mark disposed on the object to be aligned, the light receiving device being provided with a plurality of light sensors for sensing light emitting from the light emitting device on an end surface facing the object to be aligned; a processor configured to receive sensing signals transmitted from each of the light sensors and determine whether the object to be aligned is aligned accurately according to whether each of the light sensors sense the light emitted from the light emitting device. This alignment system shortens the processing time and enhances the processing efficiency.Type: GrantFiled: November 19, 2013Date of Patent: October 24, 2017Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Chaoyang Deng, Zijin Lin, Haisheng Zhao
-
Publication number: 20170294465Abstract: A film patterning method is provided. The method comprises: performing a dry etching process on a film to be patterned, so as to form a patterned film; removing a suspended particle on the patterned film; and performing another dry etching process on the patterned film after the suspended particle is removed, to form a final pattern of the film. By moving or completely removing the suspended particle on the patterned film and then performing another dry etching process on the patterned film to etch away the etching residue, existence of the etching residue is completely avoided in the final pattern of the film, so that the product yield is improved and the product quality is ensured.Type: ApplicationFiled: July 28, 2016Publication date: October 12, 2017Applicants: BOE Technology Group Co., Ltd., Beijing BOE Optoelectronics Technology Co., Ltd.Inventors: Xiaoguang Pei, Haisheng Zhao, Zhilong Peng, Hongxi Xiao, Chong Liu, Zhilian Xiao, Zijin Lin, Yunfei Bai, Huigang Jiang, Yiping Dong, Hao Chen, Miao Qiu, Kuo Chang
-
Patent number: 9774773Abstract: The present invention provides a marking apparatus for a display panel and a marking method for a display panel. The marking device comprises an image acquiring module, a simulated marking module and a real marking module. A simulated marking line is drawn, by the simulated marking module, in an image acquired by the image acquiring module, of a region containing a position where a defect occurs on a display panel to be marked. The real marking module automatically draws a real marking line on the display panel to be marked according to the simulated marking line. Thus, a position where a defect occurs on a display panel to be marked is accurately marked, and it is convenient for an engineer to accurately locate and sample the defective position in the subsequent analysis process.Type: GrantFiled: September 29, 2014Date of Patent: September 26, 2017Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Zijin Lin, Chaoyang Deng, Chao Tian
-
Array substrate, method for manufacturing the same and method for measuring the same, display device
Patent number: 9666480Abstract: An array substrate comprising an electrical connection block exposed to its surface. By manufacturing a passivation layer via hole in a passivation layer, a drain electrode or a pixel electrode of a thin-film transistor is exposed, so that the electrical connection block fills the passivation layer via hole and is provided in contact with the drain electrode or the pixel electrode. Thereby, when the electrical characteristic value of a TFT is measured, the pixel probe of a measuring apparatus may be electrically connected with the drain electrode or the pixel electrode by directly contacting the electrical connection block, so that the measuring of the electrical characteristics of the TFT may be realized.Type: GrantFiled: September 22, 2014Date of Patent: May 30, 2017Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Zijin Lin, Haisheng Zhao, Tielin Zhang -
Patent number: 9616467Abstract: The present invention provides a cleaning apparatus including at least one dust particulate absorber device(s) and a wiper device. The at least one dust particulate absorber device(s) is used for absorbing foreign matters, the wiper device is used for wiping and cleaning, and the dust particulate absorber device(s) and the wiper device are arranged in the horizontal direction.Type: GrantFiled: October 16, 2013Date of Patent: April 11, 2017Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Zijin Lin, Yaowei Wang, Yinghua Tian, Kuo Chang
-
Publication number: 20160252753Abstract: An alignment system includes: a light emitting device located on one side of an object to be aligned for emitting light towards the object to be aligned; a light receiving device located on the other side of the object to be aligned and at a standard position corresponding to an alignment mark disposed on the object to be aligned, the light receiving device being provided with a plurality of light sensors for sensing light emitting from the light emitting device on an end surface facing the object to be aligned; a processor configured to receive sensing signals transmitted from each of the light sensors and determine whether the object to be aligned is aligned accurately according to whether each of the light sensors sense the light emitted from the light emitting device. This alignment system shortens the processing time and enhances the processing efficiency.Type: ApplicationFiled: November 19, 2013Publication date: September 1, 2016Applicants: Boe Technology Group Co., Ltd., Beijing Boe Optoelectronics Technology Co., Ltd.Inventors: Chaoyang DENG, Zijin LIN, Haisheng ZHAO
-
Publication number: 20160033327Abstract: The present disclosure relates to an image calibrating method and device of a testing apparatus for thin film transistor (TFT) substrate. The method comprises following steps of: calculating an image offset value by using coordinate information of each pixel in a prescribed target image obtained by the testing apparatus for the thin film transistor substrate; and determining whether the offset value is smaller than a prescribed threshold value, in a case where the offset value is not smaller than the prescribed threshold value, adjusting the image by using the offset value and recalculating the offset value by using the coordinate information of each pixel in the adjusted image; in a case where the offset value is smaller than the prescribed threshold value, calibrating the image obtained by the testing apparatus for the thin film transistor substrate with the offset value as a calibrating value.Type: ApplicationFiled: June 30, 2014Publication date: February 4, 2016Inventors: Zijin LIN, Haisheng ZHAO, Xiaoguang PEI, Chaoyang DENG, Haitao MA
-
ARRAY SUBSTRATE, METHOD FOR MANUFACTURING THE SAME AND METHOD FOR MEASURING THE SAME, DISPLAY DEVICE
Publication number: 20150370110Abstract: The invention discloses an array substrate, a method for manufacturing the same and a measuring method, a display device. The array substrate comprises an electrical connection block exposed to its surface, by manufacturing a passivation layer via hole in a passivation layer, a drain electrode or a pixel electrode of a thin-film transistor is exposed, so that the electrical connection block fills the passivation layer via hole and is provided in contact with the drain electrode or the pixel electrode. Thereby, when the electrical characteristic value of a TFT is measured, the pixel probe of a measuring apparatus may be electrically connected with the drain electrode or the pixel electrode by directly contacting the electrical connection block, so that the measuring of the electrical characteristics of the TFT may be realized.Type: ApplicationFiled: September 22, 2014Publication date: December 24, 2015Inventors: Zijin LIN, Haisheng ZHAO, Tielin ZHANG -
Publication number: 20150262350Abstract: The present invention provides a marking apparatus for a display panel and a marking method for a display panel. The marking device comprises an image acquiring module, a simulated marking module and a real marking module. A simulated marking line is drawn, by the simulated marking module, in an image acquired by the image acquiring module, of a region containing a position where a defect occurs on a display panel to be marked. The real marking module automatically draws a real marking line on the display panel to be marked according to the simulated marking line. Thus, a position where a defect occurs on a display panel to be marked is accurately marked, and it is convenient for an engineer to accurately locate and sample the defective position in the subsequent analysis process.Type: ApplicationFiled: September 29, 2014Publication date: September 17, 2015Inventors: Zijin LIN, Chaoyang DENG, Chao TIAN
-
Publication number: 20150135452Abstract: The present invention provides a cleaning apparatus including at least one dust particulate absorber device(s) and a wiper device. The at least one dust particulate absorber device(s) is used for absorbing foreign matters, the wiper device is used for wiping and cleaning, and the dust particulate absorber device(s) and the wiper device are arranged in the horizontal direction.Type: ApplicationFiled: October 16, 2013Publication date: May 21, 2015Inventors: Zijin Lin, Yaowei Wang, Yinghua Tian, Kuo Chang