Abstract: A control circuit and control method for an interleaved switching converter having a first and second interleaved voltage regulating circuit. The control method is: controlling a first switch of the first voltage regulating circuit operating in quasi-resonant mode, turning ON a second switch of the second voltage regulating circuit after the first switch is turned ON for a half switching period, generating a current sensing signal by detecting a current flowing through the second switch, generating a peak signal, wherein the peak signal is adjusted when a voltage across the second switch is higher than a voltage reference at the time the second switch is turned ON, and turning OFF the second switch when the current sensing signal increases to the peak signal.

Abstract: A control circuit and control method for an interleaved switching converter having a first and second interleaved voltage regulating circuit. The control method is: controlling a first switch of the first voltage regulating circuit operating in quasi-resonant mode, turning ON a second switch of the second voltage regulating circuit after the first switch is turned ON for a half switching period, generating a current sensing signal by detecting a current flowing through the second switch, generating a peak signal, wherein the peak signal is adjusted when a voltage across the second switch is higher than a voltage reference at the time the second switch is turned ON, and turning OFF the second switch when the current sensing signal increases to the peak signal.

Abstract: A ripple suppression circuit has a filter circuit and a follower circuit. The filter circuit has a first input terminal coupled to a signal source to receive a ripple signal and an output terminal to output a filter signal which is the sum of the average value of the ripple signal and a positive bias signal. The follower circuit has a first input terminal, a second input terminal and an output terminal, wherein the first input terminal is coupled to the signal source to receive the ripple signal, the second input terminal is coupled to the output terminal of the filter circuit to receive the filter signal, the follower circuit provides an output signal at the output terminal, the output signal at least partially follows the filter signal.

Abstract: The present invention discloses a LED driver including a power stage, an inductor, an error amplifier, a set comparator, a first timer, a logical AND circuit, a reset comparator, a second timer a logical OR circuit, a RS flip flop and a driving circuit. The LED driver provides sufficient latching current for the TRIAC dimmer with no large RC circuit, so as to optimize the dimming and reduce system size.

Abstract: The present invention discloses a LED driver including a power stage, an inductor, an error amplifier, a set comparator, a first timer, a logical AND circuit, a reset comparator, a second timer a logical OR circuit, a RS flip flop and a driving circuit. The LED driver provides sufficient latching current for the TRIAC dimmer with no large RC circuit, so as to optimize the dimming and reduce system size.

Abstract: A ripple suppression circuit has a filter circuit and a follower circuit. The filter circuit has a first input terminal coupled to a signal source to receive a ripple signal and an output terminal to output a filter signal which is the sum of the average value of the ripple signal and a positive bias signal. The follower circuit has a first input terminal, a second input terminal and an output terminal, wherein the first input terminal is coupled to the signal source to receive the ripple signal, the second input terminal is coupled to the output terminal of the filter circuit to receive the filter signal, the follower circuit provides an output signal at the output terminal, the output signal at least partially follows the filter signal.