Abstract: A surface planarization method of thin film and a preparing method of an array substrate relate to a display field, and can solve the technical problem that the conventional dry etching severely damages the surface flatness of other film layers below the one being etched, thereby improving the display properties of the LCD. The preparing method of the array substrate comprises patterning a non-metallic layer (4) by a dry etching. And following the step of patterning a non-metallic layer (4) by the dry etching, the method further comprises performing surface planarization on a first film layer (3) to recover the first film layer (3) with a rough surface caused by the dry etching to be planar. The first film layer (3) is located below the non-metallic layer (4).

Abstract: A surface planarization method of thin film and a preparing method of an array substrate relate to a display field, and can solve the technical problem that the conventional dry etching severely damages the surface flatness of other film layers below the one being etched, thereby improving the display properties of the LCD. The preparing method of the array substrate comprises patterning a non-metallic layer (4) by a dry etching. And following the step of patterning a non-metallic layer (4) by the dry etching, the method further comprises performing surface planarization on a first film layer (3) to recover the first film layer (3) with a rough surface caused by the dry etching to be planar. The first film layer (3) is located below the non-metallic layer (4).

Abstract: An array substrate comprises data lines, gate lines, thin film transistors and pixel electrodes formed on a base substrate. Pixel units are defined by intersecting the data lines and the gate lines, the thin film transistors are formed at the intersections of the data lines and the gate lines, and the data lines extend across each of the pixel units in the middle of the pixel units. At least two thin film transistors for controlling a same pixel electrode are respectively formed on both sides of the data line in each pixel unit.

Abstract: An array substrate comprises data lines, gate lines, thin film transistors and pixel electrodes formed on a base substrate. Pixel units are defined by intersecting the data lines and the gate lines, the thin film transistors are formed at the intersections of the data lines and the gate lines, and the data lines extend across each of the pixel units in the middle of the pixel units. At least two thin film transistors for controlling a same pixel electrode are respectively formed on both sides of the data line in each pixel unit.

Abstract: An array substrate comprises data lines, gate lines, thin film transistors and pixel electrodes formed on a base substrate. Pixel units are defined by intersecting the data lines and the gate lines, the thin film transistors are formed at the intersections of the data lines and the gate lines, and the data lines extend across each of the pixel units in the middle of the pixel units. At least two thin film transistors for controlling a same pixel electrode are respectively formed on both sides of the data line in each pixel unit.

Abstract: An array substrate comprises data lines, gate lines, thin film transistors and pixel electrodes formed on a base substrate. Pixel units are defined by intersecting the data lines and the gate lines, the thin film transistors are formed at the intersections of the data lines and the gate lines, and the data lines extend across each of the pixel units in the middle of the pixel units. At least two thin film transistors for controlling a same pixel electrode are respectively formed on both sides of the data line in each pixel unit.